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Next is the series PCH. This circuit is a PCH FET in series with your input power path, a resistor pulldown on the gate, and a Zener diode on the gate to source of the FET. PCH FETs have much lower losses than a series diode, and this circuit is only three components. Running some more calculations, I’ll ballpark a PCH RDSon to be 100m ohm (once again this varies based on a bunch of things and this is a reasonable ballpark). Same load a before the FET conduction losses would be (P=(I^2)*R=(1^2)*0.1) 0.1 W which comes in at 2% of the power the load would be consuming. Much better than the series Schottky, but slightly more complex to design since it’s got a few more components.
Finally we have the classic series NMOS. This circuit is a series NCH FET in the power path. This circuit requires a charge pump to saturate the FET, however, implementing this is done by many ICs so you don’t need to do this yourself! Further, some ICs, especially for lower power applications simply put the NCH FET inside the chip itself. Realistic NCH FETs for this application could have RDSon is between 20m ohm all the way down to 0.1m ohm so much less than a PCH. If you crave even lower ESR you can simply run a few of these FETs in parallel to reduce losses even more! When following a datasheet’s instructions designing one of these circuits can be surprisingly doable. Adding an IC to the circuit will increase cost, but it is often worth it. Component count will end up about the same or more than the series PCH circuit. Another thing to note about this is a lot of ICs will have other features you may want as well (i.e. input overvoltage protection and/or an electronic fuse / overcurrent protection).
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