Page Comparison

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• input cmc ← perhaps not needed, check 12s doc to read why they implemented

• current sense

  • use INA180 unless determined otherwise

  • shunt resistor: calculate for it? to be looked up

• buck converter

  • check if existing solves, check for board space

  • if not, make buck with lower input voltage & smaller inductor to maximize board space

• LDO

  • does current one from can circuit solve? if not look for other one

  • purpose is to reduce noise from buck.. consult esc can doc for details

• diode

  • what kind of diode… to be looked up

• current limiting eFuse

  • current ones probably solve, however finding a singular IC with 4 channels instead could be better → maximizes board space

  • try and do some component selection here; will probably ask more questions

  • determine whether 4channel efuse vs 4 individuals will be better

    • things to consider:

      • cost

      • board space

      • power dissipation probs not super critical

      • if 4 channels exist for this purpose

• thermistor

  • not sure how to select one, will see later, not super high priority

Component Selection

Buck IC

• AOZ2261NQI-12

• does this solve??

  • yep

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• f = 1kHz

• Cf set to 1uF

  • size cap to be

Current Limiting IC

https://www.digikey.ca/en/products/detail/texas-instruments/TPS4H160AQPWPRQ1/6175214

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choice (for now)

• Source

  • 6V from buck

• 4-channels

• Passives

  • 15k pullup on fault pin

  • Cin

    • TBD

  • Cout

    • TBD

  • 50k to gnd on RLIM

• ^for old IC

• Overcurrent limit for eFuse

  • if possible, implementing adjustable current limit using microcontroller could be the play

    • this would require using a combination of EN and ILIM pins (perhaps also FAULT pin)

    • put notes from datasheet here:

• Passives

  • R(CL)

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• kinda made assumptions before reading this and now everything makes sense

• pins should be chosen based on what voltage divider ranges will be

• because thermistor and vbatt voltage dividers have varying VIN/R1 values, they should be on FT pins (5V tolerant) because it gives more room

  • ranges from 3V-7.3V

added caps to all to make them low passes with ~1khz cutoff

LDO

• putting two LDOs in series to drop 6V-5V, and 5V-3V3

• for 6V-5V

  • https://www.digikey.ca/en/products/detail/microchip-technology/MCP1825ST-5002E-DB/1635502

• for 5V-3V

  • reuse LDO from ESC CAN Adapter

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• https://www.digikey.ca/en/products/detail/harvatek-corporation/T3A33BRG-H9C0002X1U1930/15930508

  • seems fine?

  • VIN is 3.3-5.5 but abs max is 6.5V so can be run on 3V3 rail

  • it’s kinda chonky

• going with the one from SSD for now, using logic modifier also from SSD

  • wanna know more abt how the logic thing works

Layout

Placement

following layout guidelines for the most part

choosing not to use separate PGND and AGND pours on buck

• hopefully won’t be too noisy

• will probably be fine

Simulations

Input filtering sim

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