Introduction
Load switches allow power management systems to maximize their performances and efficiencies by controlling when and how much power needs to be supplied to specific loads.
Basics
Load switches are comprised of two main elements:
A pass transistor (commonly a MOSFET)
An on/off control block
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MOSFET Pass Transistor
The selection of a p-channel and n-channel load switch depends on the specific needs of the application. Several considerations and tradeoffs between the PMOS and NMOS are addressed ahead.
Carrier Mobility
The majority carriers of NMOS' are electrons. Contrastingly, the majority carriers of PMOS' are holes. Since electrons have greater mobility than holes, the NMOS naturally has lower RDS(on) and gate capacitance characteristics for the same die area. Thus, for high current applications, the NMOS is preferred.
Turn-On Conditions
To begin, we note that the output voltage is defined as the voltage across the load. Thus, we have:
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When using an NMOS as the pass transistor for a load switch, the drain is connected directly to the input voltage rail and the source is connected to the load. In order for the NMOS to turn on, the gate-to-source voltage must be greater than the threshold voltage of the device.
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In order to satisfy the above condition, a second voltage rail is needed to control the gate. Consequently, the n-channel load switch can be used for very low input voltage rails, or for higher voltage rails so long as the gate-to-source voltage remains higher than the threshold voltage of the device.
When using a PMOS as the pass transistor for a load switch, the source is connected directly to the input voltage rail and the drain is connected to the load. In order for the MOSFET to turn on, the source-to-gate voltage must be greater than the threshold voltage of the device.
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At minimum, the input voltage rail must be greater than the threshold voltage of the selected pass transistor.
Based on these turn-on conditions, it is clear that the on/off control block of a PMOS is much simpler than that of an NMOS.
Control Circuit Considerations
There are multiple ways to implement the on/off control block in a load switch circuit.
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The figure above shows an example control circuit for a load switch using an NMOS as the pass transistor. A logic signal from the control circuitry of the power management system turns the load switch on and off via a logic-level NMOS transistor Q1. The resistor R1 is added to limit current flow to a few mA or less when Q1 is on.
When EN is LOW, Q1 is turned off and so the gate of the pass transistor is pulled up to VGATE. Thus, when EN is LOW, the load switch is turned on. When EN is HIGH, Q1 is turned off and the gate of the pass transistor is pulled down to ground. Thus, when EN is HIGH, the load switch is turned off.
EN Voltage | Pass Transistor Gate Voltage | Load Switch State |
|---|---|---|
LOW | HIGH | ON |
HIGH | LOW | OFF |
As shown, an additional voltage source VGATE is needed to forward bias the pass transistor. Recalling from a previous section, the gate voltage must be larger than the sum of the output voltage and the threshold voltage. This may be undesirable for some systems.
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The figure above shows an example control circuit for a load switch using a PMOS as the pass transistor. A logic signal from the control circuitry of the power management system turns the load switch on and off via a logic-level NMOS transistor Q1. The resistor R1 is added to limit current flow to a few mA or less when Q1 is on.
When EN is LOW, Q1 is turned off and so the gate of the pass transistor is pulled up to VIN via the pull-up resistor R1. Thus, when EN is LOW, the load switch is turned off. When EN is HIGH, Q1 is turned on and so the gate of the pass transistor is pulled down to ground. Thus, when EN is HIGH, the load switch is turned on.
EN Voltage | Pass Transistor Gate Voltage | Load Switch State |
|---|---|---|
LOW | HIGH | OFF |
HIGH | LOW | ON |
As long as the input voltage rail is higher than the threshold voltage of the PMOS transistor, it will turn on when EN is HIGH without the need of an additional voltage source.
For both control implementations, the small-signal NMOS transistor Q1 can be integrated into the same package as the pass transistor.
Efficiency
Conduction Loss
In a load switch circuit, the load current flows directly through the pass transistor when it is turned on. Therefore, the main power loss is the conduction loss.
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The RDS(on) of the pass transistor causes a voltage drop between the input voltage and the output voltage.
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For applications requiring high load currents or low voltage rails, this voltage drop becomes critical. The voltage drop will increase as load current increases. Thus, the voltage drop for the maximum possible load must be taken into consideration when selecting the pass transistor.
Recalling from a previous section, the NMOS has an RDS(on) advantage over the PMOS for a given die size. This difference is significant at higher currents, but becomes less significant as current decreases.
Gate-to-Source Voltage Considerations
The applied gate-to-source voltage of the pass transistor directly affects the efficiency of the circuit. This is because RDS(on) is inversely proportional to the applied gate-to-source voltage. An example curve is shown in the figure below:
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The available VGS of the circuit must be considered when selecting the pass transistor. Operating too close to the knee of the RDS(on) curve can lead to higher conduction losses. Within this region, any small changes in the gate-to-source voltage could result in a large change in the RDS(on).
Inrush Current
Inrush current occurs when a load switch is first turned on and is connected to a capacitive load. The turn-on speed of the pass transistor directly influences the amount of inrush current seen on the input of the load switch.
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Inrush current causes dips in input supply voltages which can harm system functionalities. When a load switch is a first turned on, an inrush event occurs on the input as CLOAD is charged.
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The faster the device switches on, the higher the inrush current will be. This potentially harmful inrush current can be reduced by controlling the load switch turn-on characteristics. The figure below shows the simplified MOSFET turn-on transfer curves. There are four main regions for device turn-on.
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Region 1: VSG increases until it reaches VTH. Since the device is off, VSD remains at VDD.
Region 2: VSG rises above VTH and the device begins to turn on. ID increases to the final load current and CGS charges.
Region 3: VSG remains constant as VSD decreases to its saturation level and CGD charges.
Region 4: Both CGS and CGD are fully charged and the device is fully on. VSG rises to its final drive voltage VDR. The plateau voltage VPL is defined as:
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In order to control the turn-on speed of the load switch, an external resistor R1 and external capacitor C1 are added to the load switch circuit as shown in the figure below:
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The selection of R1, R2, and C1 are crucial to strong load switch performance. C1 must be much larger than the CGD of the load switch device so that C1 will dominate over it. By placing C1 between the drain and source terminals of the pass transistor, Region 3 of the VSD curve becomes linear and the MOSFET slew-rate, dVSD/dt can be controlled.
R1 and R2 form a voltage divider which determines the voltage seen at the gate of the pass transistor. These resistance values can be calculated considering when the small-signal n-channel device is on:
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Note that the maximum rating for VSG is used.
Turn-On Speed
Proper turn-on of the load switch pass transistor is essential for maximizing circuit performance and maintaining safe operation of the individual components. Optimal turn-on speed depends on the needs of the specific application and the device parameters of the selected load switch.
If the turn-on speed is too fast, a transient current spike known as inrush current can occur on the input voltage supply. A softer turn-on reduces this current spike. Slowing down MOSFET turn-on should be done with caution however.
Consider the transfer curves plotting drain current versus gate-to-source voltage in the figure below. There are three plots at three different temperatures.
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As shown, all three temperature curves will intersect at an inflection point for a specific VGS.
For a VGS above the inflection point, RDS(on) increases as temperature increases. So, as the device heats up, cells carrying higher current will become more resistive and current will be shared with cells carrying lower current. This MOSFET property creates a uniform current sharing across all the cells.
For a VGS below the inflection point, the MOSFET behaves like a bipolar transistor. As the device heats up, a cell with higher current than the surrounding cells will continue to take more current. If the device remains within this transition region for too long, thermal runaway can occur.
Thus, a load switch should be operated with a VGS above the inflection point to ensure proper function.
Sources
https://www.ti.com/lit/an/slva716a/slva716a.pdf
https://www.onsemi.com/pub/Collateral/AND9093-D.PDF
https://www.ti.com/lit/an/slva652a/slva652a.pdf