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Component Sourcing
Buck:
Filter for voltage regulators rated between 30V-40V max input voltage (larger than expected 26V), 4A output current, and 5V output voltage
3V to 36V input voltage range
up to 95% efficiency
4A continuous output current
adjustable switching frequency
adjustable output voltage (0.8V to 30V)
AOZ1284PI Buck Design:
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Exposed Pad (Vin Exposed pad - pin number on symbol??? is this ok in general for a vin pin to be an exposed pad?)
What should I use for switching frequency? From what I’ve seen online, higher switching frequency means I can use smaller inductors and capacitors but increases losses.
Going to use 1M switching frequency for reduced board space. Seems to be a typo/mistake in the datasheet as the 5000 should actually be 55000 or 52500, so in theory RF should be around 47.5 to 50 kOhms. I will be using a 47k resistor because Yageo do not offer a 46.6k
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Vout = 0.8 * (1 + R1/R2)
5V output requires standard resistor values of: R1 = 52.3k, R2 = 10k (recommended from datasheet) this yields around 4.984V
alternatively, R1 = 53.6k yields around 5.088V
Even better, 10.5K, 2K gives exactly 5V (strange that this was not recommended by the D.S)
“The combination of R1 and R2 should be large enough to avoid drawing excessive current from the output, which will cause power loss”
given this case: 105k and 20k would also be ideal
standard resistor values source: For some error tolerance and to compensate for losses, 5.2Vout will be used so R1 = 54.9k and R2 = 10k to produce around 5.19Vout
standard resistor values source: https://www.rfcafe.com/references/electrical/resistor-values.htm
(Would it be better to design for slightly higher than 5V for some error compensation?)
Component Calculations
https://www.desmos.com/calculator/6kjrso05ys ← Calculations can be found here
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Input Capacitor
Ideally <1% of Vin for ripple voltage so 0.01* (20V or 26V) ripple range: 0.2V to 0.26V
Cin should be between 3.75uF and 2.39uF, 3.3uF should be fine
Will use 4.7uF to reduce input ripple voltage, this gives around 0.52%-0.82% input ripple voltage
Output Capacitor
From online, it seems around 1% of Vout ripple voltage is desirable (lower is better obv)
Since we’re using X5R and X7R capacitors I’m assuming ESR can be ignored???
Vout is 5V so 1% is 0.05V would be preferred
For ripple current 0.2,0.3,0.4 of Iout = 4A (0.8A, 1.2A, 1.6A → 2uF, 3uF, 4uF)
higher capacitance = less ripple voltage = better 😄
https://rfcafe.com/references/electrical/capacitor-values.htm
Standard cap values within range: 2.2uF, 3.3uF
I will be choosing 3.3uF (at 0.3Iout ripple current, this is around 0.9% of output voltage (45mV)
4.7uF also works and this reduce the ripple voltage even more, this gives around 0.61% output ripple
Should be rated for >4A and >5V
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Inductor Selection (Section 3 of the TI document)
Vin = 20 - 26V
Vout = 5V
Fs ~ 1MHz
Ripple Current estimation: IL = (0.2 to 0.4) * 4A = 0.8 to 1.6
Inductor should be rated to minimum 5A to handle the peak current in the above eqn
L should be between 2.34uH and 5uH
After EE meeting, estimation of 0.3Iout for ripple current, inductor should be around 3.125uH to around 3.3uH (same calculations as above)
standard inductor values around this range: 2.4, 2.7, 3.0, 3.3, 3.6, 3.9, 4.3, 4.7, 5.1
https://www.rfcafe.com/references/electrical/
resistorAOZ1284PI Buck Design:
Exposed Pad (Vin Exposed pad - pin number on symbol??? is this ok in general for a vin pin to be an exposed pad?)
What should I use for switching frequency? From what I’ve seen online, higher switching frequency means I can use smaller inductors and capacitors but increases losses.
Using a 100k resistor for 500kHz of switching frequency
Will be choosing 3.3uH inductor to satisfy the requirements
https://www.digikey.ca/en/products/detail/sumida-america-inc/0630CDMCCDS-4R7MC/5812458
https://www.digikey.ca/en/products/detail/sumida-america-inc/0630CDMCCDS-3R3MC/5812457
Loop Compensation Resistor and Capacitor
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With 4.7uF cap output, and around 10kHz bandwidth (this is 1/100 of the switching frequency but the stack exchange https://electronics.stackexchange.com/questions/479305/low-cost-buck-smps-with-ic-aoz1284-5v-x-4a-values-for-comp-pin answer verified with sims that around 10kHz is a more realistic achievement (Need to get this verified)
Rc is about 2050 ohms so 2k resistor should work
RL is the load resistor value, load resistance = Vout/Iout = 5/4 = 1.25Ohms
CC is around 2.9375nF so a 3nF cap (3.3nF will be used)
Others
Enable Pin is high between 1.2V and 5V so 3.3V from the AFE IC will be supplied to this pin (filter cap needed??)
Soft start Pin: “A soft start process begins when the input voltage rises to 3V and voltage on EN pin is HIGH. In soft start process, a 2.5µA internal current source charges the external capacitor at SS. As the SS capacitor is charged, the voltage at SS rises. The SS voltage clamps the reference voltage of the error amplifier, therefore output voltage rising time follows the SS pin voltage. With the slow ramping up output voltage, the inrush current can be prevented. Minimum external soft-start capacitor 850pF is required, and the corresponding soft-start time is about 200µs.”
will be using 10nF cap, was available on the WARG component library (relatively similar value)
Schottky Diode:
To reduce the losses due to the forward voltage drop and recovery of diode, Schottky diode is recommended to use. The maximum reverse voltage rating of the chosen Schottky diode should be greater than the maximum input voltage, and the current rating should be greater than the maximum load current.
Using the SK54A-LTP Diode which is already in the warg component library
rated for 40V @ 5A which should be enough for 26Vin and 4A current out
Cell Monitor IC
https://www.digikey.ca/en/products/filter/power-management-pmic/battery-management/713
https://www.digikey.ca/en/products/detail/analog-devices-inc/LTC6810IG-2-3ZZPBF/9658988
https://www.digikey.ca/en/products/detail/rochester-electronics-llc/AD7280WBSTZ-RL/12102176
Still not exactly sure how the cell monitoring should be handled, a BMS chip is kinda what I’m thinking or at least some sort of cell monitoring device. An issue I have right now is component sourcing since digikey’s search is yielding some fraudulent results (I think links 1 & 2 for the BMS) since most of the ones that say they can support up to 6 cells (from analog devices) really only support 2 Li-ion (I’m assuming this is the type of battery WARG uses).
The LT6810 chip seems really ideal but it operates SPI/I2C and is the master node in this case (is this alright?!?! I would expect this kind of peripheral to be the slave node in this case)
Most cell monitoring ICs are rated for more than 6 cells (usually 8-12) so I don’t think that is a huge problem that some pins won’t be used (redundant not optimal :0), almost none of them have a CAN bus serial protocol so I’ll need to use an IC to convert the signals most likely
Also, in a perfect world I would use the same IC to monitor current and cell voltage but most chips I have found only operate on one of the functionalities
Using two separate IC’s (one for BMS one for current), how does data transmission work if both are sending data on the line?
- Optimal IC I think would be the BQ7692, might be wrong here but I think it has current sense capabilities
3-6s cell monitoring
no ADC (connect to MCU and use that one)
Current Sense
Some thoughts:
AFE Design:
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Does D23 need to be implemented if we are using an XT90 Connector?
STM32
Using the STM32L431KCU6 (the same one from Meghan’s CAN adapter circuit)
Will be using the CAN adapter circuit Meghan Dang, with STM32, 8Mhz oscillator, and connectors
On Pin definitions of the STM datasheet (starting at Page 59), the UFQFPN32 model is the one used for this design
ADC pins used (Voltage, temp readings from AFE)
Pin 8 [PA2] → ADC_REF2 (reference voltage for AFE2)
Pin 14 [PB0]→ ADC_REF1 (reference voltage for AFE1)
Pin 11 [PA5]→ VCOUT_1 (voltage data 1)
Pin 10 [PA4]→ VIOUT (current data)
Pin 15 [PB1]→ VCOUT_2 (voltage data 2)
Instead of hooking the SPI lines from both AFEs up together, 2 separate SPI ports are used on the STM32 (I2C1and I2C3)
Pin 19 [PA9] → SCL1 [I2C1_SCL]
Pin 20 [PA10] → SDA1 [I2C1_SDA]
Pin 13 [PA7]→ SCL2 [I2C3_SCL]
Pin 27 [PB4]→ SDA2 [I2C3_SDA]
Overcurrent GPIO pin connected to pin 9 [PA3] (regular I/O)
Everything else is the same as usual for the CAN adapter circuit except OSC_EN (connected to Pin 7, should be fine)