GOAL: Reduce the Bulk Cap to the lowest capacitance allowing for proper functionality of the ESC (120F3[X]v2) used in the pegasus drone.
Due to the inductance of the conductor path from the battery to the ESC, load transients presented by the ESC will cause voltage to fluctuate at the ESC terminals. If this voltage drops below a certain value (need to find the optimal nominal voltage range, and characteristics of the motor’s load transients), also known as rail droop/collapse, for a long enough time, the motor/ESC functionality will be negatively affected. A Bulk capacitor can be used to compensate for this, and provide the demanded transient current.
Specifications:
The length of the conductor path (8 gauge wire) from the positive battery terminal to the ESC is ~117cm. This might be useful for finding the inductance of the PDN (NOTE: Inductance strongly depends on the loop area. Since this loop area is not well defined, it might be fine to approximate it with straight wire inductance… need more research). From this resistance calculation tool, this segment of wire results in ~2.5 Ohms of resistance (though the PDB and other interconnects will increase this valueits best to determine it through measurement).
The inductance of the harness, measured at the input of the ESC with an LCR meter, is 1uH.
The measured resistance of the harness is 60mOhms.
(The two measurements above seem oddly low).
From the Pegasus Overview, the maximum required current from all 4 motors “is anticipated to be 90Amps… Any individual motor will not draw more than 23 amps at a time, not including the path”. Can . Another section of the doc says the max is 25 amps. I will use that, and neglect the, much smaller, ESC control circuitry (3 Half bridge drivers, MCU, MOSFET gates, …) current be neglected?
(But the doc section below seems to indicate a max of 25A).
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current (gate driver quiescent current, LEDs, etc.).
Upper Bound Calculations:
Our “to-ESC” ESC’s PDN can be abstracted to:
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In this scenario, the only source of current for the ESC is the capacitor, and given some general ESC ratings/requirements for good performance (need to figure out), an upper limit for the necessary capacitance can be found.
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Modelling in terms of load transient current as the input and capacitor voltage as the output results in a non-linear system. Can try to use Numerical methods to come up with a formula for finding capacitance.
It is an LC circuit, so current transients cause it to resonate. The higher the cap’s ESR, the more these oscillations are damped. Low ESR is better for efficiency and reducing voltage droop magnitude but worse for dampening oscillations!
Closer Upper-Bound Calculations (PDN Analysis):
A slightly more accurate approximation of the ESC’s PDN is the following:
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or
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During a load transient, when the ESC suddenly sinks some current, we can employ AC analysis to see what happens at the input of the ESC (what will the voltage differebcedifference/ripple at the ESC, caused by the transient look like?) and from there, we can add proper decoupling to compensate:
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To elaborate, we want to design our PDN such that, for the worst case load transient (at a rate/frequency of our concern; i.e. the fastest rate at which current can change through the BLDC motor coils), the rail collapse / voltage ripple doesn’t go beyond the ESC’s rated tolerance (need to find).
This means, for the maximum current IMAX (which gets drawn during the transient), the voltage difference across the PDN’s equivalent impedance must be below Vripple (maximum voltage ripple tolerable by the ESC).
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This maximum allowable equivalent impedance Z is called the target impedance.
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Now, to find the capacitance necessary to compensate for this (you will see in the impedance formula that, the higher the capacitance, the lower the impedance), I’ve modelled the equivalent impedance of our PDN:
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The black line is the ESC’s input impedance; thered line is the target impedance.
The results of this expression have been found to match those of this PDN analysis tool.
Now, if If we know Desmos graph parameters:
Parameter | Description |
|---|---|
Vripple | maximum allowable ripple at ESC power input |
IMAX | maximum ESC current draw |
Rh | harness equivalent resistance |
Lh | harness equivalent inductance |
maximum x (frequency) | **largest frequency component/harmonic of the load transient (for which we want ZPDN<Ztarget) |
we can appropriately find a an appropriate bulk capacitor, with parameters
Rc | Bulk cap ESR |
C |
Lc
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Bulk cap capacitance | |
Lc | Bulk cap ESL |
Vripple and the frequency range of our concern have yet to be identified.
The current, inconclusive, conclusion:
Applying PDN analysis on the current setup, the bulk caps we have in place (Electrolytic 330uF, 10mm dia., 20mm height) seem to be more than enough. Assuming the caps have the worst case (max) expected ESL and ESR (since these parameters are obscure; Lc = 25nH, Rc = 52mOhm), using the measured harness parameters Lh = 1uH, Rh = 60mOhm, and taking IMAX = 25A, the maximum voltage ripple should be about 1V for all load transients up to 400kHz (see this desmos plot).
To actually optimize the bulk capacitance value using the PDN analysis approach, ESC and motor behavior/performance need to be characterized for the needed variables mentioned above. That is, the maximum allowable voltage ripple at the ESC power input (Vripple) and the frequency/rate at which the worst-case load transient can be drawn (x).
Otherwise, by repeatedly observing the effect of different bulk caps on actual ESC/motor load transients or with a beefy enough E-load, the capacitance can be optimized via trial and error.