Via Information
- Daniel Puratich
Introduction
Vias are used to connect between multiple layers on a PCBA. This document seeks to answer some common questions about them. Feel free to improve and link to the numerous useful external resources on this topic.
External Resources
Types of Vias
TODO Explain: microvias, drilled vias, laser vias, etc.
TODO Explain: how drilled vias are plated normally
TODO Explain: filled vias (copper filled and compound filled)
TODO Explain: tenting - when to do it, when not to do it
We mostly do drilled & tented vias through every layer here at WARG so pretty simple.
Current Handling Capability
Traces
When we size traces and polygons on a PCBA or even wires in a harness we make the trace or wire wider and thicker so it can carry more current. This makes intuitive sense for two reasons:
resistors in parallel decrease the total resistance
less resistance implies less electric energy is converted to heat as it flows in the copper
a larger conductor has an easier time dissipating heat into the environment then a smaller conductor
the easier it is to get rid of heat means the more current our conductor can handle
Commonly when sizing wires in a system we refer to common charts. When calculating PCB trace sizing PDN analysis in Altium can be done and Saturn PCB Toolkit can also be used to calculate simple geometries under different conditions. Sierra circuits also offers a calculator for simple geometries https://www.protoexpress.com/tools/trace-width-and-current-capacity-calculator/ .
Vias
A rule of thumb is that a standard via can handle 1 A of current safely though of course there are a ton of variables to consider that often allow more than this. If you want more current carrying capability the simplest way of achieving this is to simply place more vias.
This is unintuitive to most who initially believe simply making a via larger should be done to increase current carrying capability. This is technically true but it is extremely marginal compared to just placing more of the same size via. Consider the geometry of a via and this becomes much more intuitive though I will show an example below.
For precise calculations that can be used as further proof of this, consider Saturn PCB toolkit or https://www.protoexpress.com/tools/via-current-capacity-temperature-rise-calculator/ calculators. IPC standards are also great here!
Example
Let’s say I need to pass 5 A of current between layers on a PCB. Let’s propose some solutions here and run the numbers using Saturn PCB toolkit (which uses IPC-2152) on a standard 62mil board assuming I can place vias with the pads touching each other:
Using only 0.2mm drill with 0.4mm pad vias.
This tells me a single via can carry 1.74 A so I will need 3 of these vias to carry the current.
1.74 * 3 = 5.22 > 5
To place three vias in a line requires 0.4*3= 1.2mm so this requires 1.2x0.4 = 0.48 mm^2 of board area to carry the current.
Using only 0.25mm drill with 0.5mm pad vias.
This tells me a single via can carry 1.96 A so I will still need 3 of these vias to carry the current.
1.96 * 3 = 5.88 > 5
To place three vias in a line requires 0.5*3=1.5mm so this requires 1.5x0.5 = 0.75 mm^2 of board area to carry the current.
Using only 0.4mm drill with 0.8mm pad vias.
This tells me a single via can carry 2.52 A so I will need only 2 of these vias to carry the current.
2.52 * 2 = 5.04 > 5
To place two vias in a line requires 0.8*2=1.6mm so this requires 1.6*0.8=1.28mm^2 of board area to carry the current
Feel free to change the numbers and play with it yourself, maybe some excel plots also show this nicely, but this is a good way of looking at it.
High Speed Via Considerations
TODO Explain: how a via can cause a stub
https://www.protoexpress.com/tools/via-impedance-calculator/