Three Phase Inverter

Gate Driver:

Current sense is critical to our board as it is half the inputs to the FOC algorithm. In my opinion it is much more reliable to get a gate driver that has built-in current sense and says that it is designed for FOC applications. TI has an amazing line-up of these FOC gate drivers. The original we wanted went out of stock but the 60V max version should be sufficient. Transient loading could be a concern with the 60V max rating but I think we should be fine.

MOSFET:

(1) Conduction Loss:

Open

(2) Gate Charge Loss:

Open

(3) Output Capacitance Loss:

(4) Switching Transition Loss:

Ref: How to Compute MOSFET Switching Losses ElectronicsBeliever

Power Loss Results:

Note that the following calculations are for comparison purposes ONLY. They are not the actual power losses of the FETs for this board. For these calculations, we will be using Vds = 30V, Id = 18A, Vgs = 10V, fsw = 100kHz. These parameters were chosen as they seemed to be common among the FET datasheets, if you change these parameters then you end up changing the FET’s values for Rds(on), Coss, tr and tf.

MOSFET Selection - Andrew

• Aiming for Low Rdson

Calculation Process:

Nominal Operating Condition Values:

Duty Cycle: D = 0.33 (MAX)

Max Switching Frequency: fsw = 20kHz

Max continuous current (Max throttle): Id = 60A

Drain to source voltage (Pack voltage): Vds = 48V

Gate to source voltage: Vgs =10V

FET Specific Values:

Drain to source on voltage: Rdson ~ few milli ohms

Gate Charge: Qg ~10s to 100s of nano coulombs

Output Capacitance: Coss ~ 100s to 1000s of pico farads

Rise time: tr ~ 10s of nano seconds

Fall time: tf ~ 10s of nano seconds

Thermal Resistance: Rja ~ 10s of °C/W [how hot the FET gets per watt dissipated]

Normalized Thermal Impedance:

• Can be obtained from t1 of duty cycle t1 = D/fsw → match this value with the corresponding t1 on the x-axis and match it to the curve with the duty cycle being used (0.3 for simplicity sake here)

• The y-value is the multiplier for the normalized thermal impedance → in this example ~0.3

• Thus normalized thermal impedance is 0.3 * Rja

Miller Plateau Voltage:

FET Power Loss Calculations:

Conduction Loss → Equation 1

Gate Charge Loss → Equation 2

Output Capacitance Loss → Equation 3

Transition Loss → Equation 4

Total Power Loss = Conduction Loss + Gate Charge Loss + Output Capacitance Loss + Transition Loss

Junction temperature above ambient = normalized thermal impedance * Total power loss

https://www.desmos.com/calculator/nu30h0eaui

*Values used are worst case