| Table of Contents | ||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
|
Introduction
Who?
Reserved for Daniel Puratich co-op
Context
COTS ELRS PWM Receiver: https://betafpv.com/products/elrs-micro-receiver
What?
Integrated PCB for:
Buck converter for 3S Battery Input
5 V output at 4 A
ELRS PWM Receiver
ESP8285 Backpack
SX128X or SX1280 RF IC
6x output connections for PWM for
2x Flaperon
1x Elevator
1x Rudder
2x Motors
Single XT60 Battery Connection
XT60 Battery Output intended to connect to ESC (electronic speed controller)
Why?
Intended to integrate all electronics for the simple foam plane into a single PCBA.
ESC is still separate for the motor(s) but that project is coming later down the line.
https://uwarg-docs.atlassian.net/wiki/spaces/FT/pages/2628419591/2024-07-28+Foam+Plane+Flight+Test?search_id=cea8ab0a-d5e4-4c9b-9494-7c45af7982c5 foam plane for context
When using 12V->5V @ 5A Buck Converter Board we have two PCBAs
Overview
System Diagram
At the current moment, the SX1281 (RF IC) and ESP8285 (central MCU) are built into an off-the-shelf package called the ELRS Micro Receiver from BetaFPV. In order to reduce size and weight of the fixed-wing aircraft, we want to integrate the buck converter/LDO regulator onto a single board with the MCU and RF IC. We also want 1 more PWM output (versus the Micro Receiver’s 5) for an additional point of control for the fixed-wing plane. We also want to allow for the possibility of connecting 2 motors, so the battery input will be directly split to 2 output XT60s.
This buck converter will be missing the reverse polarity protection from the Meghan’s board, as it was deemed not required for this project.
Prerequisites
Buck converter definition
DC-to-DC step-down converter; decreases voltage while increasing current
More efficient than linear regulators due to the difference in voltage not being released as heat (“converted” to current)
Components:
Source (Vin)
Switch
Usually a transistor (FET), rapidly switches on and off
The ratio at which the switch is on vs. off is called the duty cycle
When connected, it allows current to flow from the source to the inductor
Diode
Is activated when the switch is disconnected, due to the polarity of the inductor (L) flipping
Inductor
Stores energy in its magnetic field when switch is connected
Releases the energy when disconnected
Capacitor
Standard functions; reduces ripple in voltage and stores energy for a steady output
Basic operation
Past the circuitry above, there is a control (feedback) mechanism monitoring the output voltage and adjusting the duty cycle to match the desired output.
In addition, the diode in a switching regulator can be substituted for another switch (transistor); this is called a synchronous buck converter (versus a diode’s non-synchronous operation). Synchronous buck converters have better efficiency than their non-synchronous counterparts, due to diodes always having a voltage drop (typically from 0.3V to 0.7V according to Claude). Having another transistor switching removes this inefficiency, but also makes the internal circuitry of the IC more complicated.
A few calculations
The inductance (L) can be calculated based on the relationship between the voltage and current across the inductor. This relationship can be calculated with Equation (1):
V = L × dl/dt
Where the voltage across the inductor is VIN - VOUT, dI is the peak-to-peak IL (∆IL) (typically 10% to 60% of the maximum output current, IOUT), and dt is Q1’s turn-on time, calculated with Equation (2):
dt = D × t_sw
With Equation (1), the state of the inductor’s energy storage when Q1 is turned on can be analyzed.
Input filters
https://drive.google.com/file/d/1S0Mzs7YdFf1vUP41wHp3JbctDb-8adoG/view
As frequency increases, capacitance decreases (until a certain inflection(?) point in real-life capacitors)
As frequency increases, inductance increases (until a certain point in real-life inductors)
When putting the same capacitors in parallel, their effects stack, pushing the inflection point further down the scale
When putting different capacitors in parallel, their effects stack as well, creating high points of resonance in places where the capacitors are oscillating together additively
…more within the presentation linked
ExpressLRS TX
What is a Backpack?
https://www.expresslrs.org/hardware/backpack/esp-backpack/
A Backpack is an add-on device that facilitates wireless communication between an ExpressLRS module and another device (e.g. a Video Receiver on a pair of FPV goggles) using the ESPnow protocol.
Simplex, Half/Full-Duplex transceivers
Simplex transceivers can only either: transmit or receive data. Half-duplex can both transmit and receive, but only one at a time. Full-duplex can perform both at the same time. For example, a portable radio might have a simplex receiver since it only needs to receive and output data, while a smartphone, which is constantly connected, would need a full-duplex transceiver for less latency and more bandwidth.
Crystal Oscillators
Explanation here…
Component Selection, Schematic Design
Buck Converter
Buck IC
TPS564247DRLR Buck IC
Synchronous IC with up to 95% duty cycle
3V to 16V input voltage
0.6V to 7V output voltage
1.2MHz switching frequency
Up to 4A of continuous current supported
On paper, this IC meets our design requirements. Calculations for verification begin below:
Calculating the duty cycle: Delta = ~(V_in)/(V_out,max x efficiency) = ~(5V)/(16V x 0.90) = ~0.3472…
Calculating inductor ripple current: Delta_I_L = ((V_in,max - V_out) x duty cycle)/(f_sw x L_average); where L_average is the average L value from the datasheet (L1_max - L1_min).
Delta_I_L with averaged L1 = ~((16V - 5V) x 0.347) / (1.2MHz x ((4.7 + 1.5)/2)uH) = 1.026A
Delta_I_L with “typical” L1 = ~((16V - 5V) x 0.347) / (1.2MHz x 1.8uH) = 1.767A
Calculating I_IC_max = high side current limit - Delta_I_L/2 = 6A - 1.767A/2 = 5.1165A
Our target output current of 4A is well under the calculated max IC current of 5.1165A.
Calculating peak switch/diode/inductor current: I_SW_max = I_out_max + Delta_I_L/2 = 4A + 1.767A/2 = 4.8835A
Inductor
Assuming the ripple current is 30% of the maximum output current:
L_min = (5V) x (16V - 5V) / (0.3 x 4A) x 1.2MHz x 16V = 0.00000238715… = 2.387uH
Since this is close enough to the “Typical L1” listed in the recommend components from the datasheet, the typical L1 value of 1.8uH will be selected for the application (which happens to be a common E-value, making sourcing easier).
https://www.digikey.ca/en/products/detail/bourns-inc/SRP7028A-1R8M/4876644
Capacitors
Following the datasheet recommendation, a 10uF ceramic capacitor was selected from WARG’s existing library (GRM188R61E106KA73J) for the input capacitor. It comes in an 0603 package and is rated for 25V, which is well above the maximum input voltage of 16V. Another 100nF capacitor was selected as per the datasheet’s recommendation for high frequency filtering.
For the output capacitors, the datasheet states a typical C_out value of 44uF. To meet this spec, the design includes 2 22uF capacitors.
Bulk Capacitors
https://www.ti.com/lit/an/slyt670/slyt670.pdf?ts=1726655175328 (long and complex)
A 22uF aluminum radial capacitor was selected for bulk capacitance.
Feedback Resistors
5V = 0.6 x (1 + R1/10k)
R1 = 73.33k (ideal)
A 73.2k resistor was picked from the existing WARG library.
Connectors
1x XT60 Battery Connector (Receptacle)
When connected to the battery, this will provide voltage input for the aerial system.
The XT60 battery output is intended to connect to the ExpressLRS system and ESC.
The connector was added from WARG’s existing library.
ExpressLRS System
A quick and effective way to begin the design process is to view existing schematics of the SX1280 + ESP8285 online, as well as any example schematics from the datasheets. This will give a reference/guideline for how we want to design our own board.
Transceiver
SX1281 RF IC
The IC series was pre-selected as per Daniel’s guideline of building based off of the BetaFPV ELRS Micro Receiver. Two options are available on DigiKey: SX1281 and SX1280. Since the SX1281 only adds an additional (not needed) feature and is cheaper on DigiKey, it was selected for this system.
Transceiver: Crystal Oscillator
CS07103 (52MHz variant)
As per the datasheet’s recommended design, a 52MHz crystal from NDK America was picked. It is assumed that an amplifier is already integrated into the SX1281, which in conjunction with the crystal, creates an oscillator for the RF IC.
Microcontroller
ESP8285 MCU
Going off of popular options and knowing what is integrated into the BetaFPV ELRS Micro Receiver, the ESP8285 was selected.
The ESP8285 datasheet says 
; the VDD_RTC (device voltage for real-time clock?) is 1.1V or NC (no connection). Generic No ERC symbol is left on the pin. Every other “VDD…” pin is left connected to 3.3V as per datasheet guidelines of 2.7V - 3.6V.
TOUT 
for voltage sensing, implement? No.
The ESP8285 calls for a crystal oscillating between 24MHz and 52MHz. In order to maintain BOM simplicity, the CS07103 (52MHz variant) from above will be reused.
Connecting the SX1281 to the ESP8285 for SPI is something like this:
Do the same for all of the requisite pins.
Pull-up/down resistors
https://learn.sparkfun.com/tutorials/pull-up-resistors/all
This is something usually covered in a first-year digital logic course/lab, but as a direct example: the SX_NSS net is connecting the NSS_CTS pin of the SX1281 to the MTDO pin (HSPI_CS; Chip Select for SPI) ESP8285. A separate pull-down resistor to ground is added, as when no data is flowing to the SX1281, we don’t want it to be floating (someone verify this statement). So, we add a resistor in series to ground, so that during normal operation, the signal is fine, and when the connection is off, any stray activity is pulled down to ground.
We can do similar for the NRESET pin (view pinout table from earlier). The SX1281 takes a signal from the ESP8285 to reset itself. This is pin is active low as stated in the table, so when it is off, it will be enabled. Since this means that the 8285 will send a low signal in order to trigger a reset, we want the pin to be pulled high until that occurs. So it’s the same deal as above, except we pull it to be powered by default.
Connectors
There are 3x6 2.54mm pitch pin connectors for connecting to the ESC. Each 6-pin line is for: 5V power, ground, and PWM output.
This is for current limiting, in case a user were to short the board.
1x U.FL Antenna Connector (Male Pin)
In order to facilitate flexible antenna positioning for the RF IC, the board requires a connector for the antenna. Also, Daniel would like to use this connector in his board.
The part, schematic symbol and footprint were created and uploaded to WARG’s library.
2.4GHz RF Chip Antenna (ESP8285)
The ESP8285 needs to communicate over WiFi, so the LNA_IN pin must be connected to an antenna, whether that be a trace antenna created during PCB layout or a chip antenna. For ease of design (avoiding the process and calculations of impedance matching), a chip antenna was opted for.
An existing chip antenna part from a previous board was placed from WARG’s library.
XT60-PW-F Connectors (x2)
The fixed wing plane could be upgraded to two servos. For this, we want to deliver the buck converted output of 5V @ 4A to the devices. Motors at WARG often use this connector.
LED
A red LED was added to the GPIO pin on the ESP8285. In order to find the right resistor value, we can use the following formula: V_input - V_forward_voltage = desired_current x resistor. Say we wanted 10mA across the an LED with 2V forward voltage:
(3.3V - 2V) = 10mA x R.
This makes R equal to 130 ohms. We can find and place the appropriate resistor into the design.
Flashing the ESP8285/SX1281
https://github.com/crteensy/ELRS-8285-1280-5xPWM
GPIO0, 2, and 15 are preferably configurable.
https://github.com/ExpressLRS/targets/blob/master/RX/Generic%202400%20PWMP6.json
Matching the above generic hardware specification can make firmware flashing much more simpler. This means editing the pins to match what is specified. GPIO0 is specified to be a PWM pin in this case, but also needs to be controllable for firmware flashing. Since it is connected to a 2.54mm receptacle, it can be accessed via a wire with a header pin during flashing. In order to give easy access to 3.3V and GND, 2 additional male header pins were added respectively.
Schematic Design Review
Net Naming Guidelines - Making sure each power net in the design has an appropriate label. Crucial for PCB layout time.
Electrical Terminology - A sort of review for terminology in EE
Clean up schematic styling - following industry/WARG standards for a clean and readable final schematic
Next, can let EFS team know of the design and to review that the PWM outputs from the ESP8285’s pins are possible and appropriate. Once that is complete, an EE lead can do a final review, and PCB layout can begin.
Input Filter Simulation
Mainly working off of https://drive.google.com/file/d/1S0Mzs7YdFf1vUP41wHp3JbctDb-8adoG/view, an impedance analysis plot across various frequencies was made to verify the function of the decoupling capacitor network. seeing as V/I = Z, the plot is labelled with V(v1)/I(V1). As equivalent series inductance and resistance values vary depending on frequency, many of the ESR/ESL values were taken at the 1MHz point of frequency (since the buck IC has a switching frequency of 1.2MHz), or taken from a general rule of thumb (I pulled these ESL values from Daniel’s presentation). Values from Murata SimSurfing.
The majority of the capacitor network is built with MLCCs (multi-layer ceramic capacitors). These have low inductance and resistance but have high Q-values, making them good at targeting specific frequencies (higher frequencies) that need to be brought down within the impedance plot.
Electrolytic capacitors, on the other hand, are often higher energy, but also have higher (equivalent series) inductance and impedance. This means that they are slower to react to sudden changes in current or voltage. They have a lower Q, meaning they are able to target a wider, often lower range of frequencies. They are physically larger as well, many packaged in a radial cylinder form.
Many of the recommended schematics for this buck IC only added a few barebones capacitors. This would likely be fine, but due to our use case having sensitive RF applications for communication with the fixed-wing plane, as well as the plane having 6 PWM outputs (which could introduce high frequency noise), the additional filtering is welcome.
PCB Layout
Basic Guidelines
This board will be 61x30.5mm, with an area of 1860.5mm^2. According to Mounting Hole & Pattern Specifications, this makes the board a “medium” size, meaning it will need M2 screw mounting holes. These have 2.40 mm hole diameter and 4.20mm annular ring diameter and will go in the corners of the board. Each hole will need 8 appropriately sized vias equally spaced out. We can add the holes themselves as a pad.
PCB Layers
Following this 4-layer stackup with no impedance control from JLCPCB, our manufacturer.
Buck Converter
The following are layout guidelines and examples from the TPS56424x buck IC datasheet.
