12V -> 5V @ 4A Buck Converter + ELRS Receiver

Introduction

Who?

  • Reserved for @Daniel Puratich co-op

  • @Kenny Na

What?

Integrated PCB with:

  • Buck converter designed for a 3S battery input

    • 1x XT60 input connector (for ~12V)

    • Power split to 2x XT60 output connectors (~12V)

      • intended to connect to ESCs

    • 5V output at 4A

  • ELRS Receiver with PWM output

    • ESP8285 Backpack

    • SX128X or SX1280 RF IC

    • 5V to 3.3V LDO for IC power

  • 6x output connectors for servo PWM signaling

    • 2x Flaperons

    • 1x Elevator

    • 1x Rudder

    • 2x Motors

Why?

How?

Project Link

Altium 365 | 12V-5V 4A Buck + ELRS

A note on documentation

This project was documented in a sequential manner; meaning a majority of the content was written and never updated to match with some of the revised design decisions. Check the Altium 365 project link for the latest design.

This design documentation was created to be extremely in-depth and includes a lot of basic theory which might be redundant to some readers, but (hopefully) helpful to some who are interested in the project but are new to electrical engineering and PCB design. You could hypothetically fully replicate the board with just the information contained in this document.

Overview

System Diagram

image-20240918-190712.png
Not completely accurate.

At the current moment, the SX1281 (RF IC) and ESP8285 (central MCU) are built into an off-the-shelf package called the ELRS Micro Receiver from BetaFPV. In order to reduce size and weight of the fixed-wing aircraft, we want to integrate the buck converter/LDO regulator onto a single board with the MCU and RF IC. We also want 1 more PWM output (versus the Micro Receiverโ€™s 5) for an additional point of control for the fixed-wing plane. We also want to allow for the possibility of connecting 2 motors, so the battery input will be directly split to 2 output XT60s.

This buck converter will be missing the reverse polarity protection from the Meghanโ€™s board, as it was deemed not required for this project.

Prerequisites

Buck converter definition

image-20240909-145141.png
Top-down diagram (Philโ€™s Lab #60)
  • DC-to-DC step-down converter; decreases voltage while increasing current

  • More efficient than linear regulators due to the difference in voltage not being released as heat (โ€œconvertedโ€ to current)

  • Components:

    • Source (Vin)

    • Switch

      • Usually a transistor (FET), rapidly switches on and off

        • The ratio at which the switch is on vs. off is called the duty cycle

      • When connected, it allows current to flow from the source to the inductor

    • Diode

      • Is activated when the switch is disconnected, due to the polarity of the inductor (L) flipping

    • Inductor

      • Stores energy in its magnetic field when switch is connected

      • Releases the energy when disconnected

    • Capacitor

      • Standard functions; reduces ripple in voltage and stores energy for a steady output

Basic operation

image-20240909-151329.png
Switch ON: Current passes through this circuit, ignoring the diode and storing energy in the inductor
image-20240909-151504.png
Switch OFF: The magnetic field in the inductor collapses and changes polarity, and the circuit is now looped as cropped
  • Past the circuitry above, there is a control (feedback) mechanism monitoring the output voltage and adjusting the duty cycle to match the desired output.

  • In addition, the diode in a switching regulator can be substituted for another switch (transistor); this is called a synchronous buck converter (versus a diodeโ€™s non-synchronous operation). Synchronous buck converters have better efficiency than their non-synchronous counterparts, due to diodes always having a voltage drop. Having another transistor removes this inefficiency, but also makes the internal circuitry of the IC more complicated.

A few calculations

The inductance (L) can be calculated based on the relationship between the voltage and current across the inductor. This relationship can be calculated with Equation (1):

V = L ร— dl/dt

Where the voltage across the inductor is VIN - VOUT, dI is the peak-to-peak IL (โˆ†IL) (typically 10% to 60% of the maximum output current, IOUT), and dt is Q1โ€™s turn-on time, calculated with Equation (2):

dt = D ร— t_sw

With Equation (1), the state of the inductorโ€™s energy storage when Q1 is turned on can be analyzed.

image-20240909-154632.png
Graph to visualize delta iL

Input filters

ExpressLRS TX

What is a Backpack?

https://www.expresslrs.org/hardware/backpack/esp-backpack/

A Backpack is an add-on device that facilitates wireless communication between an ExpressLRS module and another device (e.g. a Video Receiver on a pair of FPV goggles) using the ESPnow protocol.

Simplex, Half/Full-Duplex transceivers

Simplex transceivers can only either: transmit or receive data. Half-duplex can both transmit and receive, but only one at a time. Full-duplex can perform both at the same time. For example, a portable radio might have a simplex receiver since it only needs to receive and output data, while a smartphone, which is constantly connected, would need a full-duplex transceiver for less latency and more bandwidth.

Crystal Oscillators

Crystal (quartz) exhibits the piezoelectric effect, vibrating at a certain frequency to facilitate real-time clock activities for the microcontroller.

Component Selection, Schematic Design

Buck Converter

Buck IC

On paper, this IC meets our design requirements. Calculations for verification begin below:

image-20240911-125715.png
Formulas for component selection - Philโ€™s Lab
image-20240911-130914.png
Efficiency for buck IC at 5V out - from datasheet
image-20240911-132244.png
Recommendations from datasheet

Calculating the duty cycle: Delta = ~(V_in)/(V_out,max x efficiency) = ~(5V)/(16V x 0.90) = ~0.3472โ€ฆ

Calculating inductor ripple current: Delta_I_L = ((V_in,max - V_out) x duty cycle)/(f_sw x L_average); where L_average is the average L value from the datasheet (L1_max - L1_min).

Delta_I_L with averaged L1 = ~((16V - 5V) x 0.347) / (1.2MHz x ((4.7 + 1.5)/2)uH) = 1.026A

Delta_I_L with โ€œtypicalโ€ L1 = ~((16V - 5V) x 0.347) / (1.2MHz x 1.8uH) = 1.767A

image-20240911-135659.png
MOSFET electrical characteristics: using I_OCL_LS as the ICโ€™s high-side current limit (I_LIM_min)

Calculating I_IC_max = high side current limit - Delta_I_L/2 = 6A - 1.767A/2 = 5.1165A

Our target output current of 4A is well under the calculated max IC current of 5.1165A.

Calculating peak switch/diode/inductor current: I_SW_max = I_out_max + Delta_I_L/2 = 4A + 1.767A/2 = 4.8835A

Inductor

image-20240911-140600.png
Inductor selection: Philโ€™s Lab

Assuming the ripple current is 30% of the maximum output current:

L_min = (5V) x (16V - 5V) / (0.3 x 4A) x 1.2MHz x 16V = 0.00000238715โ€ฆ = 2.387uH

Since this is close enough to the โ€œTypical L1โ€ listed in the recommend components from the datasheet, the typical L1 value of 1.8uH will be selected for the application (which is a common E-value, making sourcing easier).

https://www.digikey.ca/en/products/detail/bourns-inc/SRP7028A-1R8M/4876644

Capacitors

image-20240911-142140.png
Input capacitor recommendations - from datasheet

Following the datasheet recommendation, a 10uF ceramic capacitor was selected from WARGโ€™s existing library (GRM188R61E106KA73J) for the input capacitor. It comes in an 0603 package and is rated for 25V, which is well above the maximum input voltage of 16V. Another 100nF capacitor was selected as per the datasheetโ€™s recommendation for high frequency filtering.

https://www.digikey.ca/en/products/detail/murata-electronics/GRM188R61E106KA73J/9887674?s=N4IgTCBcDaIOICUCyBGAHGhA2FBRFADFgNICCA7AMwBSIAugL5A

For the output capacitors, the datasheet states a typical C_out value of 44uF. To meet this spec, the design includes 2 22uF capacitors.

image-20240912-155759.png
5V row from datasheet recommended component values table

Bulk Capacitors

https://www.ti.com/lit/an/slyt670/slyt670.pdf?ts=1726655175328 (long and complex)

A 47uF aluminum radial capacitor was selected for bulk capacitance. See Input Filter section below for why this decision was made.

Feedback Resistors

image-20240911-175357.png

5V = 0.6 x (1 + R1/10k)

R1 = 73.33k (ideal)

A 73.2k resistor was initially picked from the existing WARG library. This would give: 0.6 x (1 + 73.2k/10k) = 4.992V.

However, if we try 20k and 150k resistors (both common values), we can get 0.6 x (1 + 150k/20k), which gives us a Vout of 5.1V. Given some losses in the traces and PCB, we can be satisfied with this solution to deliver close to 5V.

Connectors

  • 1x XT60 Battery Connector (Receptacle)

    • When connected to the battery, this will provide voltage input for the aerial system.

    • The XT60 battery output is intended to connect to the ExpressLRS system and ESC.

    • The connector was added from WARGโ€™s existing library.

ExpressLRS System

A quick and effective way to begin the design process is to view existing schematics of the SX1280 + ESP8285 online, as well as any example schematics from the datasheets. This will give a reference/guideline for how we want to design our own board.

Transceiver

  • SX1281 RF IC

The IC series was pre-selected as per Danielโ€™s guideline of building based off of the BetaFPV ELRS Micro Receiver. Two options are available on DigiKey: SX1281 and SX1280. Since the SX1281 only adds an additional (not needed) feature and is cheaper on DigiKey, it was selected for this system.

Recommended Design - SX1281 RF IC Datasheet

Transceiver: Crystal Oscillator

  • CS07103 (52MHz variant)

As per the datasheetโ€™s recommended design, a 52MHz crystal from NDK America was picked. It is assumed that an amplifier is already integrated into the SX1281, which in conjunction with the crystal, creates an oscillator for the RF IC.

Microcontroller

  • ESP8285 MCU

Going off of popular options and knowing what is integrated into the BetaFPV ELRS Micro Receiver, the ESP8285 was selected.

The ESP8285 datasheet says ; the VDD_RTC (device voltage for real-time clock?) is 1.1V or NC (no connection). Generic No ERC symbol is left on the pin. Every other โ€œVDDโ€ฆโ€ pin is left connected to 3.3V as per datasheet guidelines of 2.7V - 3.6V.

The ESP8285 calls for a crystal oscillating between 24MHz and 52MHz. A frequently used 26MHz crystal (CG01972-26M) was selected.

Connecting the SX1281 to the ESP8285 for SPI:

MTCK on the ESP8285 is a GPIO pin, with MOSI (master-out-slave-in). We can connect this to:
MOSI_RX on the SX1281, which is the SPI slave input.

Do the same for all of the requisite pins.

Flash configuration using pull-up/down resistors

https://learn.sparkfun.com/tutorials/pull-up-resistors/all

This is something usually covered in a first-year digital logic course/lab, but as a direct example: the SX_NSS net is connecting the NSS_CTS pin of the SX1281 to the MTDO pin (HSPI_CS; Chip Select for SPI) ESP8285. A separate pull-down resistor to ground is added, as when no data is flowing to the SX1281, we donโ€™t want it to be floating (someone verify this statement). So, we add a resistor in series to ground, so that during normal operation, the signal is fine, and when the connection is off, any stray activity is pulled down to ground.

SX_NSS net.

We can do similar for the NRESET pin (view pinout table from earlier). The SX1281 takes a signal from the ESP8285 to reset itself. This is pin is active low as stated in the table, so when it is off, it will be enabled. Since this means that the 8285 will send a low signal in order to trigger a reset, we want the pin to be pulled high until that occurs. So itโ€™s the same deal as above, except we pull it to be powered by default.

NRESET pin on the SX1281 (on the right).

Connectors

There are 3x6 2.54mm pitch pin connectors for connecting to the servos. Each 6-pin line is for: 5V power, ground, and PWM output.

This is for current limiting, in case a user were to short the board.

  • 1x U.FL Antenna Connector (Male Pin)

    • In order to facilitate flexible antenna positioning for the RF IC, the board requires a connector for the antenna. Also, Daniel would like to use this connector in his board.

    • The part, schematic symbol and footprint were created and uploaded to WARGโ€™s library.

  • 2.4GHz RF Chip Antenna (ESP8285)

    • The ESP8285 needs to communicate over WiFi, so the LNA_IN pin must be connected to an antenna, whether that be a trace antenna created during PCB layout or a chip antenna. For ease of design (avoiding the process and calculations of impedance matching), a chip antenna was opted for.

    • An existing chip antenna part from a previous board was placed from WARGโ€™s library.

  • XT60-PW-F Connectors (x2)

    • The fixed wing plane could be upgraded to two servos. For this, we want to deliver the buck converted output of 5V @ 4A to the devices. Motors at WARG often use this connector.

LED

A red LED was added to the GPIO pin on the ESP8285. In order to find the right resistor value, we can use the following formula: V_input - V_forward_voltage = desired_current x resistor. Say we wanted 10mA across the an LED with 2V forward voltage:

(3.3V - 2V) = 10mA x R.

This makes R equal to 130 ohms. We can find and place the appropriate resistor into the design.

Flashing the ESP8285/SX1281

https://docs.espressif.com/projects/esptool/en/latest/esp8266/advanced-topics/boot-mode-selection.html

GitHub - crteensy/ELRS-8285-1280-5xPWM: ELRS receiver with an SX1280/1281 and 5 PWM outputs, based on the ESP8285.

GPIO0, 2, and 15 are preferably configurable.

targets/RX/Generic 2400 PWMP6.json at master ยท ExpressLRS/targets

Matching the above generic hardware specification can make firmware flashing much more simpler. This means editing the pins to match what is specified. GPIO0 is specified to be a PWM pin in this case, but also needs to be controllable for firmware flashing. Since it is connected to a 2.54mm receptacle, it can be accessed via a wire with a header pin during flashing. In order to give easy access to 3.3V and GND, 2 additional male header pins were added respectively.

Schematic Design Review

Net Naming Guidelines - Making sure each power net in the design has an appropriate label. Crucial for PCB layout time.

Electrical Terminology - A sort of review for terminology in EE

Clean up schematic styling - following industry/WARG standards for a clean and readable final schematic

Next, can let EFS team know of the design and to review that the PWM outputs from the ESP8285โ€™s pins are possible and appropriate. Once that is complete, an EE lead can do a final review, and PCB layout can begin.

Input Filter Simulation

Mainly working off of InputFilterDiscussionJune2024WaterlooAerialRoboticsGroup.pdf, an impedance analysis plot across various frequencies was made in LTspice to verify the function of the decoupling capacitor network. Seeing as V/I = Z, the plot is labelled with V(v1)/I(V1). As equivalent series inductance and resistance values vary depending on frequency, many of the ESR/ESL values were taken at the 1MHz point of frequency (since the buck IC has a switching frequency of 1.2MHz), or taken from a general rule of thumb (I pulled these ESL values from Danielโ€™s presentation). Values from Murata SimSurfing.

Example time-domain simulation in LTspice from Daniel Puratichโ€™s RPi Rev. C board. A pulse is generated via command to simulate a user hot-plugging a 48V battery into the network.

L5 is given parameter {L} as its inductance value, as the simulation steps L through the list (in the .step command) in different increments.

Frequency Domain

Basic impedance analysis plot in frequency domain with source impedance of 10mOhm and 10mH source inductance. Bulk capacitor disconnected.
22uF bulk capacitor connected. The peak of the y-axis on the graph is now reduced to ~12dB (from 21dB).

Decibels to linear ratio

The basic formula for converting decibels (dB) to a linear ratio is:

Ratio = 10^(dB/20)

To calculate the impedance factor:

  • dB value = -11

  • Plugging this into the formula: Ratio = 10^(-11/20) Ratio = 10^(-0.55) Ratio โ‰ˆ 0.282

This means that the impedance decreased by a factor of approximately 0.282.

Time Domain

Thinking about the chain of connections: The battery has some parasitic impedance, the XT60 connection will have some internal resistance, and the wire will have some as well. We can use those values and add them together to create a more accurate simulation.

XT60 connector has an internal resistance of 0.8mOhms.

Since there is both a M and F XT connector, we can multiply 0.8mOhm x 2 to get 1.6mOhm for internal resistance from the battery connection.

The battery itself is a 3S LiPo battery. During healthy, regular battery use and age, the internal impedance may range from 7 - 12 mOhms. Older cells may have higher values (maybe 20mOhm or so). Since there are 3 cells in series within a 3S battery, we can add the resistance up 3 times: 20mOhms x 3 = 60mOhms.

Lastly, the wire may add additional resistance. We can hazard a guess at 5mOhm of additional resistance.

Input impedance: Because this is harder to find a general ballpark number for, we step L through a range of values, up to 500nH.

For our pulse command, we set the initial voltage to 0 (battery is disconnected), and the top voltage to 12.6V, which is the voltage of a 3S battery when it is fully charged. We can pick a few values for the rise and fall times, which should be the duration that the battery is being connected via XT60. This should be quick.

Simulating plugging in a 3S battery into the input filter.

As shown in the plot, we get a maximum input voltage of around 18.5V, which we need to account for either by (1) creating a more complicated input filtering system or (2) selecting a buck IC that can handle this maximum voltage.

Our buck IC we selected earlier. Absolute Maximum Ratings from the datasheet.

We can view the absolute maximum rating instead of the recommended maximums for this case, since our peak above 16V is only a transient on the order of a few microseconds (around 6). As in the datasheet, the absolute maximum rating for this buck IC is 18V, which we exceeded in the simulation. This makes this transient unsafe and plugging in a battery in the current state of the input filter + IC selection could kill the buck IC.

With a new bulk capacitor selected.

Now, with a 47uF aluminum electrolytic capacitor, the transient voltage spike does not go above 18V, which means that our system should now be within spec of the buck IC.

2 bulk capacitors in parallel.

For fun, adding another bulk capacitor shows the peak transient voltage as even lower, going a little above 14V. This makes the system quite safe and well within the long-term use/recommended operating spec. However, due to the size constraint of the board, it remains to be seen whether 2 bulk capacitors is a viable idea.

More theory

The majority of the capacitor network is built with MLCCs (multi-layer ceramic capacitors). These have low inductance and resistance but have high Q-values, making them good at targeting specific frequencies (higher frequencies) that need to be brought down within the impedance plot.

Electrolytic capacitors, on the other hand, are often higher energy, but also have higher (equivalent series) inductance and impedance. This means that they are slower to react to sudden changes in current or voltage. They have a lower Q, meaning they are able to target a wider, often lower range of frequencies. They are physically larger as well, many packaged in a radial cylinder form.

Many of the recommended schematics for this buck IC only added a few barebones capacitors. This would likely be fine, but due to our use case having sensitive RF applications for communication with the fixed-wing plane, as well as the plane having 6 PWM outputs (which could introduce high frequency noise), the additional filtering is welcome.

Resonant frequency:

f_res = 1/(2pi x sqrt(LC))

The resonant frequency of the bulk capacitor is = 1/( 2pi x sqrt((10nH)(22uF)) ) = 339.319479 KHz

10uF MLCC capacitor: = 1/( 2pi x sqrt((300pH)(10uF)) ) = 2.90575842 MHz

1uF MLCC capacitor: = 1/( 2pi x sqrt((300pH)(1uF)) ) = 9.18881492 MHz

0.1uF MLCC capacitor: = 1/( 2pi x sqrt((300pH)(0.1uF)) ) = 29.0575842 MHz

PCB Layout

Basic Guidelines

This board will be 61x30.5mm, with an area of 1860.5mm^2. According to https://uwarg-docs.atlassian.net/wiki/spaces/EL/pages/2189197330, it will need M3 screw mounting holes. Existing parts for these screw holes exist in the WARG library and will be placed in the corners of the board. Each hole will need 8 appropriately sized vias equally spaced out.

PCB Layers

on JLCLCB website

Following this 4-layer stackup with no impedance control from JLCPCB, our manufacturer.

in Altium Designer

Buck Converter

The following are layout guidelines and examples from the TPS56424x buck IC datasheet.

Layout guidelines from the buck IC datasheet.
Top-down layout example.

ESP8285

image-20241004-182028.png
From ESP8266 Hardware Design Guidelines datasheet.
image-20241004-182207.png
image-20241004-182144.png
image-20241023-192046.png
DigiKey trace impedance matching calculator for the ESP antenna.

SX1281

reference design with vias
image-20241008-160121.png
Filter layout

Designs

Layout #3: Super compact 30.5x30.5mm, nice except the crystal for the ESP8285 is underneath the board, the 1x3 pins are shoved to the right of the board anyways (they ideally should be next to the XT60-F connectors), and the RF trace lengths are not optimized.
Layout #4: edit based on layout #3, putting the 1x3 next to the XT60-F connectors since thatโ€™s where the ESCs go. Pretty lazy design from me.
Layout #5: Redoing the entire board from scratch, keeping in mind that the bulk cap can be pretty far from the main source while the MLCCs should be closer.
image-20241004-143556.png
Layout #6: Moving the XT60 connectors to the bottom of the board and doing a weird configuration where the antenna for the ESP is in the middle of the board. Not optimal, scrapped.
image-20241008-030401.png
Layout #9: really tight buck loop, 45 degree ESP, ufl connector routed in an interesting location. Moving forward with this design!
image-20241008-164720.png
Adjustments to layout #9.
image-20241009-174316.png
Silk.

Useful resources while reviewing board:

https://blog.antenova.com/an-introduction-to-embedded-antenna-placement

https://resources.altium.com/p/when-use-tented-vias-your-pcb-layout

https://www.altium.com/documentation/altium-designer/pdn-analyzer-cst#power-integrity-essentials

Changes Following Review

Chip Re-selection: the ESP32-C3

Justification

While on the ExpressLRS Discord (asking why the 6PWM generic SX1280 target didnโ€™t have a radio_busy pin definition), a senior developer recommended the use of the ESP32C3.

image-20241016-171036.png
The ESP32-C3 has more accurate PWM signaling as well.

The โ€œinternal LED PWM controllerโ€ mentioned above is actually just a hardware PWM controller, built for precise control of LEDs but can be used for any PWM purpose. This controller is superior to previous implementations due to:

  • Hardware-based timer, independent of CPU (no interrupts)

  • Can handle very high frequencies at precise resolutions

image-20241016-170928.png
The ESP8285 can only comfortably do 5x PWM output.

The ESP32C3 comes with better PWM signaling, and a most importantly: a more streamlined pinout, kitted with additional GPIO pins (that donโ€™t also happen to be unusable because theyโ€™re connected to the internal flash).

So, schematic capture and layout begins again with this new chip. Weโ€™ll be using the ESP32C3-FH4, as it comes with 4MB integrated flash within the 32-pin QFN package.

New Generic Target (for C3)

https://github.com/ExpressLRS/targets/blob/master/RX/Generic%20C3%202400%20PWM.json

image-20241016-171527.png
radio_busy, and 6x PWM pinouts.

Schematic Capture

https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf

https://docs.espressif.com/projects/esp-hardware-design-guidelines/en/latest/esp32c3/schematic-checklist.html#gpio

https://docs.espressif.com/projects/esp-hardware-design-guidelines/en/latest/esp32c3/pcb-layout-design.html#pcb-layout-design

image-20241016-172040.png
Luxurious GPIO count.
image-20241016-184608.png
Antenna design guidelines. 50 Ohm impedance matching.

Bring-up & Validation

Theoretical Efficiency Calculation

Calculating Efficiency (Rev. A)

There are multiple significant sources of loss in a buck converter:

  • Inductor losses from ESR

  • MOSFET losses from RDS_ON (the โ€œESRโ€ or DCR from drain to source)

  • MOSFET switching losses (relevant in SMPS due to rapid switching)

Inductor Loss

This board uses a 1.8uH powder-core inductor from Bourns called the SRP7028A, with an ESR of 17mOhm. Using the root-mean-square load current value flowing from the switch node on the IC to the inductor, we can use PLOSS = (IRMS2) x (RDCR) to calculate power loss. Under full load:

PLOSS = (4 Amps)2 x (17 mOhm) = 27.2 mW

MOSFET Conduction Loss

image-20241110-224454.png
From TPS564247 datasheet.

For the high-side MOSFET (controlling the input path during a rise in current) and the low-side MOSFET (the equivalent of the diode in an asynchronous buck converter, conducting when the high-side input switch is off), the TPS564247 gives RDS(ON) values.

PLOSS =