48V->12V,8V,5V @ 3A BEC (Buck Converter)

Project whitepaper:

https://warg.365.altium.com/designs/BA1886A1-87A3-459C-B25E-4C3D181A3101

 

ToDo:

Requirements/Needs Assessment

Architecture

Some notes:

  • Input will be 2S (around 6V lowest) min not 5V.

  • Using 3 output LEDs is wasteful. 0 is enough.

  • There might need to be different TVS diodes for the different output voltages. → Nah

Sense Option A)

image-20240225-221339.png

Sense Option B)

image-20240225-221723.png

Buck IC options

 

Component Selection

Buck Converter Components

Latest TI Design Calculation Tool plug and chug excel file (ignore the file name):

  • ^This is the tool I used to verify/finalize all values

Buck controller

 

Frequency setting resistor

Inductor

Output Capacitors

  • COUT = 3 x 22uF, 25V, ceramic, X7R, 1206 or 1210 size

  • https://www.desmos.com/calculator/iwoiula6yw

    • Lower capacitance value (30.838uF) is needed to achieve an optimal s <= 1% ripple. But, for 12s nominal input to 5.1V output, TI design calculation tool recommends de-rating to 47uF. Using 3 x 22uF for low ESR.

    • Here input voltage is X axis and capacitance is Y axis:

  • Ceramic cap.s have low ESR. Higer ESR increases capacitance needed.

 

Input Capacitors

  • CIN = 6 x 4.7uF, 100V, ceramic, X7R, >2.52 RMS current

    • Option: GRJ31CZ72A475KE01L

      • 10mR ESR per capacitor. Approximate ESR for 6 in parallel is 10mR/6 = 1.67mR

  • https://www.desmos.com/calculator/uovqhzl57b

    • To achieve an optimal 2% ripple:

      • At 5.1V out, 21.98uF minimum capacitance is needed (at 7.5V in).

      • At 8V out, 13.471uF minimum capacitance is needed (at 11.8V in).

      • At 12V out, 8.772uF minimum capacitance is needed (at 17.5V in).

  • TI design calculation tool recommends de-rating to 6 x 4.7uF

  • https://www.desmos.com/calculator/x1iysyhtb4

    • 2.52 RMS rating computed from a de-rated 5A output (1.8 RMS rating if de-rating to 3.5A)

    • Here D = 0.5 gives the maximum value:

  • Per the TI design tool recommendation:

    • Max ESR for 2% ripple at 5V is 15mR

    • Max ESR for 2% ripple at 8V is 25mR

    • Max ESR for 2% ripple at 12V is 39mR (7mR for 1%, which parallel capacitors can achieve)

Additional Input Capacitor

  • From LM5146 datasheet Section 10:

    • I think the CD chosen in the EMI Filter section should be enough to deal with this.

Power MOSFETs

  • https://www.desmos.com/calculator/o9jukbktfa

    • Power loss calculations assume nominal conditions: 3A, 45V in, 5V out. (Note: Nominal is updated to 5.1V output, but the power analysis results in the below table/graphs should be effectively the same.)

    • Assuming 14ns tdt1 and tdt2, which is the LM5146 default.

Option

Cost

$2.52

$1.47

$2.05

$2.51

$2.62

VDSS

80V

60V

60V

60V

60V

Max IDS

74A

69A

100A

100A

100A

Max temp

150C

150C

150C

150C

150C

Rth

50C/W

50C/W

50C/W

50C/W

50C/W

RDS

6.2mR

7.8mR

5.7mR

3.3mR

2.8mR

tR

7ns

5.5ns

6.3ns

12ns

5ns

tF

5ns

2ns

1.7ns

7ns

5ns

QG

24nC

17nC

15nC

27nC

33nC

QRR

37nC

54nC

63nC

28nC

65nC

VF

0.9V

0.8V

0.8V

0.9V

0.9V

Pcond1 calculated

0.0063041W

0.0079310W

0.0057957W

0.0033554W

0.0028470W

Pcond2 calculated

0.050433W

0.063448W

0.046366W

0.026843W

0.022776W

Psw calculated

0.17153W

0.099708W

0.10347W

0.26548W

0.1485W

Pgate calculated

0.0396W

0.02805W

0.02475W

0.04455W

0.05445W

PRR calculated

0.3663W

0.5346W

0.6237W

0.2772W

0.6435W

PcondBD calculated

0.016632W

0.014784W

0.014784W

0.016632W

0.016632W

PQ1 = Pcond1 + Psw + Pgate

0.21744W

0.13569W

0.13401W

0.31339W

0.20580W

TQ1 = PQ1*Rth + Tambient=25C

35.872C

31.78C

31.701C

40.669C

35.290C

PQ2 = Pcond2 + Pgate + PcondBD + PRR

0.47297W

0.64088W

0.70960W

0.36523W

0.73736W

TQ2 = PQ2*Rth + Tambient=25C

48.648C

57.044C

60.480C

43.261C

61.868C

Comments

Good for Q2

Good for Q2

Good for Q1

Good for Q2

Good for Q1

Some example combos:

1) CSD18563Q5A and CSD18534Q5A

2) BSC034N06NSATMA1 and BSC039N06NSATMA1

3) CSD18563Q5A and BSC039N06NSATMA1

Although Combo 3 has appx. 1% better efficiency, Combo 1 has some benefits. Both MOSFETS would be of the same brand and have similar rise/fall time. Also, Combo 1 is $1.04 cheaper overall.

Soft-Start Capacitor

 

  • Css = 16V, 680nF X7R

    • Option: https://www.digikey.ca/en/products/detail/murata-electronics/GCM188C71C684KA64D/2591904

    • image-20240407-150507.png

  • Yields 54.4ms startup time. Longer time will help lower inrush currents.

  • Theory: https://www.analog.com/en/resources/analog-dialogue/articles/preventing-start-up-issues-due-to-output-inrush-in-switching-converters.html

    • It seems 54.4ms is more than good enough, even overkill, to ensure that ICAP is small

Feedback Resistors

Control Loop Compensation

  • Desired crossover frequency is typically chosen to be 10% to 20% of of the switching frequency, so 33kHz is a good pick.

  • Zeros and poles are placed per TI design tool recommendation.

    • 2 compensator zeros are placed just before the LC double pole.

    • The 1st compensator pole is placed near the zero created by COUT and it’s ESR. Since the ESR of the COUT currently chosen is so low (1mR but assuming 2mR worst case) the first pole is at a very high frequency (not even visible on the Bode Plot).

    • The 2nd compensator pole is half the switching frequency.

    • Phase shift is between 50% to 70% at crossover frequency, for all 3 output voltages, which is what is recommended.

UVLO Resistors

 

  • VEN is 1.2V and IHYS is 10uA

  • It would be more ideal to have different output (5.1V, 8V, or 12V) demand a different minimum VIN(on), rather than having a 6V minimum that would be too low to be applicable to the 8V and 12V outputs. The strategy for doing this is choosing a constant VIN(on) to VIN(off) difference, in which case RUV1 will be constant.

ILIM

  • Going to use shunt sensing option to lower complexity of considering a changing Q2 RDS value.

  • BEC will support 3A continuous current. Anything past 4A to 4.3A will trigger ILIM protection.

    • (Maybe consider increasing the ILIM current. But, high inductor saturation current and DC current rating is hard to find and the DCR is bad)

  • Rs = 2mR, 1/8W.

  • RILIM = 71.5R, 1/8W

  • Per the TI design calculation tool, for these values:

    • Result in 4A limit at 5.1V output.

    • Result in 4.3A limit at 12V output.

    • It is recommended that the inductor saturation current accounts for the limit current + ripple: 4.3 + (4.3 * max 50% ripple)/2 <= 5.375A. So the inductor chosen should saturate at > 5.375A.

PGOOD Resistor

VCC Capacitor

  • TI design calculation tool recommends 2.2uF

  • CVCC = 2.2uF, 16V

    • Vcc is the output of a 7.5V BIAS regulator, 16V capacitor rating is enough

    • Option: GRM188R61E225KA12D

BST Capacitor

EMI Filter Design

SYNCOUT and SYNCIN

  • SYNCOUT will be NC.

  • SYNCIN will be tied to ground:

Anti-ringing snubber

Other Components

Input Polyfuse

Input TVS

Input Common Mode Choke?

  • TBD. Is this necessary?

  • What is the comparison between this and the EMI filtering option in the LM5148 datasheet?

  • → Jerry recommends going with the EMI filter option since the datasheet mentions it.

    • BUT, don’t completely disregard the choke option incase the EMI filtering option is not enough for common mode noise rejection from ESCs and other sources.

Input Header

  • XT60PW-M connector

Output TVS

Output Headers

  • XT60PW-M connector

    • This keeps the it simple as opposed to having multiple output header types, which would increase board weight. XT60PW to <header type> adapters can be used off the board.

Output LEDs

  • The goal is to optimize efficiency. A RED LED needs 20mA and lets say 5mA for a quarter the brightness. With 2V drop, LED for the 12V output would need a 2kR resistor. Under 5mA, power dissipated by the resistor would be 0.05W. The LED and it’s resistor will also add to board space/weight.

    • Given the requirement for high efficiency, and noting that the OTC BEC does not have LEDs, this BEC will not include LEDs.

Output Selection “Jumper”

Current Sense Amplifier and its Header???

  • This design will use Sense Option B architecture option. I don’t see an advantage to current sense unless the BEC has an emergency shutoff that is controlled externally.

 

Shower Thought on a Vsense line:

  • There could be Vsense line feature added for accounting for voltage drop in the harness. Vsense+ and Vsense- come from the load device. Need to think more about this, but it would be a valuable feature to add if feasible/economical.

    • Brainstormed ideas:

      • 1) Feed Vsense+ and Vsense- into a unity gain difference amplifier, that has rail-to-rail voltage swing. The amplifier output would tie directly into the FB pin of the LM5146. The amplifier will be referenced to local ground.

        • Con: The rail-to-rail thing becomes tricky when the load voltage is already almost the same as the BEC output voltage. The LM5146 would end up thinking the load voltage is a couple mV lower than it really is and raise it when unneeded. The op-amp should be chosen with great care to achieve an acceptably small rail-to-rail margin.

      • 2) Feed the difference amp output into a VCR (Voltage controlled resistor) that is part of the resistor divider on the FB pin.

      • etc…

Layout and Manufacturing Considerations

Vias

Footprints

LM5146RGYR

  • https://www.ti.com/lit/an/slua271c/slua271c.pdf?ts=1712335775976

    • Sections 3 has valuable info related to QFN footprint design and thermal vias

      • It is a good idea to have a via keep out region near pin 1

    • Section 4 has valuable info related to the QFN stencil. The stencil holes may need to be smaller than the QFN pads, else the volume of solder may be too high.