The ELRS Gemini TX is a custom PCB that acts as the transmitter controller for the antennas on the ground to communicate with the drone. It involves using 2 transmitter modules with a TX power of 27dBm (about 8km range) simultaneously transmitting the same information on slightly different frequencies. The goal is to reduce the risk of lost data due to poor connectivity with a single antenna - transmitting the same info twice essentially doubles the chances of the command information reaching the drone successfully.
This project is WARG’s customized version of the ExpressLRS team’s design. To see their design for a Gemini TX, see here:
https://www.youtube.com/watch?v=VcC50cX3a7EDesign Overview
The board receives 5V power from the tracking antenna PCB. Using 3 separate LDOs, 3 different 3.3V rails are generated: 1 for each of the TX modules, and 1 for the ESP devices and FTDI UART to USB bridge. The 5V is also used to power the fans used to cool the TX modules.
The core of the PCB is an ESP32-PICO microcontroller. The ESP32 runs the software on ExpressLRS’s GitHub for the Gemini transmission. It communicates with the TX modules over SPI in order to upload the data to be transmitted over radio. It also uses various read/write GPIO to enable the transmitters, reset them, and check their state. The ESP32 also controls the TX fans using PWM.
UART is the main protocol used for the rest of the communication with the ESP32. During normal operation, the only other device the ESP32 communicates with is the TX16 controller. However, by jumping the various pin headers on J2 and J4, a different device can be selected. This allows the ESP32 to be flashed over USB, or for the ESP32 to flash the ESP-01F backpack.
The ESP-01F is intended to act as a “backpack”. Essentially it is intended to wirelessly communicate with the drone to update specific settings, specifically for frequency and channel selection for the drone’s wireless devices. Mainly a QOL feature, not required for standard operation of the drone.
The two 2.4GHz antennas allow the ESP32-PICO and ESP-01F to be flashed over WiFi for ease of updating. It’s also the ESP-01Fs primary method of wireless communication when acting as a backpack.
Block Diagram
Design Files & Models
Mechanical Models
Design Notes/Justifications
Fan Candidates
Best Fan Candidate
4 pins (5V, GND, PWM OUT, TACHO IN)
Claims 250mA max
9 Pin Locking Connector
PCB connector
Wire connector
https://www.digikey.com/en/products/detail/molex/5013300900/1531506
Good stock (20,000+ on each item)
9 Pos
SMT, right angle mounted
Locking
Molex
LDO Selection
LDO is rated for 1A minimum and 1.3A typical? The 800mA is the current at which the dropout voltage is measured at, and for that there's a plot on page 8 of the datasheet that shows <1.4V dropout voltage at all temperatures at 1A output, so with a 5V input we should be in the clear. Based on that I'm going to leave the LDOs in, as even the minimum rating clears the absolute maximum of the ESPs
ESPs draw 500mA tops each
We should be in the clear with these 1.3A typical LDOs
Chip Antennas
Reference Designators
Reference designator sizes are selected such that designators for larger, more significant parts such as connectors and important ICs are sized larger to make them easier to find. This is done instead of having all reference designators be the same size. The reasoning behind this is that during assembly, rework, and debugging, it would be more helpful to have the designators for these parts be more visible and easier to find on the board.
Mounting Grid
Board mounting holes are currently 90mm by 60mm which allows it to be mounted on a 30mmx30mm scheme that is standard in WARG. A future board revision may aim to move many components inwards and bring the board edge up to the connectors for aesthetic and board size optimization.
Via Sizing & Stitching
The following app note was referenced for stitching the GND pours around the RF sections: https://www.infineon.com/dgdl/Infineon-AN91445_Antenna_Design_and_RF_Layout_Guidelines-ApplicationNotes-v09_00-EN.pdf?fileId=8ac78c8c7cdc391c017d073e054f6227
Larger vias used for the stitching to provide more copper, providing better conduction capacity & continuity between planes (larger hole size = more copper around circumference of cut through plane)
Smaller vias used for signals and other areas to make it easier to fit vias closer together, i.e. for ESP signal fanout, due to large hole to hole clearance of 0.5mm required by JLCPCB
DECISION UPDATE: Learned that larger vias only provide marginally better current capacity. It is better to have more vias closer together (more vias actually provides more current capacity, closer together reduces inductance)
For this board, larger vias will be replaced with the smaller vias to have all vias be the same size. Number of vias may be increased for certain power pours/ground stitching to improve current capacity & thermal performance. RF vias will be made smaller, but otherwise won’t be changed as spacing is already only 1/50th of 2.4GHz wavelength, much below the 1/20th maximum spacing recommended in Infineon app note linked above
Discord conversation resulting in this decision: https://discord.com/channels/776618956638388305/1112251506339618836/1151579646274588742