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Background

Every net in your schematics should be named with a net label (no exceptions). This is crucial as it provides clear information regarding the signal you are working with during PCB layout. For example, it is unclear what kind of layout considerations are required for a signal named NetLabel_C15_1.

By convention nets should be all caps and without spaces in all cases. Net names should all be the default Altium color, font, and size for consistency.

The follow sections provides examples for good net names for specific instances.

Power Nets

Power nets must be defined such that their regulator topology is clear. For example, the nets associated with a buck converter should have a prefix with “BUCK”.

For example, a +3.3V net and +12V net should be named PP3V3 and PP12V0 respectively.

Buck Converter Nets

For example, consider a 12V to 3V3 buck converter. The bootstrap net should be named:

  • BUCK_PP3V3_BOOT

LDO Nets

For example, consider a 12V to 3V3 LDO. The feedback net should be named:

  • LDO_PP3V3_FB

Digital Nets

GPIO Nets

For example, a 3V3 LL GPIO for commanding the select pin of a 2:1 multiplexer from an MCU should be named:

  • GPIO_MCU_TO_MUX_SEL0_3V3

Generally,

  • GPIO_A_TO_B_PURPOSE_LL

PWM Nets

For example, a 3V3 LL PWM for commanding the high-side FET of a half-bridge for phase U of a gate driver from an MCU should be named:

  • PWM_MCU_TO_GDVR_UH_3V3

Generally,

  • PWM_A_TO_B_PURPOSE_LL

UART Net

With A as the transmitter and B as the receiver, for 3V3 LL, we have:

  • UART_A_TO_B_TX

  • UART_B_TO_A_TX

Notice that both nets are defined to be transmitting. The only difference is the direction from the transmitter and receiver.

SPI Net

With A as the master and B as a slave, for 3V3 LL, we have:

  • SPI_A_TO_B_MISO_3V3

  • SPI_A_TO_B_MOSI_3V3

  • SPI_A_TO_B_CLK_3V3

  • SPI_A_TO_B_CS_3V3

I2C Nets

With A as a master and B as a slave, for 3V3 LL, we have:

  • I2C_A_TO_B_SDA_3V3

  • I2C_A_TO_B_SCL_3V3

Differential Pairs

Consider a USB device

Analog Nets

Voltage Sense

Voltage sense analog nets should be denoted with a prefix “VSNS”.

  • VSNS_A_TO_B_PURPOSE_LL

Current Sense

Current sense analog nets should be denoted with a prefix “ISNS”.

  • ISNS_A_TO_B_PURPOSE_LL

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