1 - Theory
This section will cover a bit of preemptive theory that will help you make informed decisions when placing your PCB components and routing your connections.
A PCB is typically just layers of copper separated by dielectric.
In Altium Designer and as PCB designers, we typically pick how many layers we want, how thick we want the layers to be and then we specify shapes we want cutout in the copper. A PCB manufacturing company will then assemble these layers and etch out the copper we don’t want based on the file we make in Altium and that is very basically how we design a PCB. By separating out different parts of copper which we then connect with components, we basically form all of our schematic nodes/nets out of copper.
We route traces on these layers of copper which are basically wires that connect different components and we can also make connections between layers by using vias, which are essentially drilled holes in the PCB which are then electroplated with copper to make connections through the via which can be seen in the picture above.
When we think about a wire or an electrical connection, we typically think of it in the entirely ideal way which is that a wire or electrical connection is a perfectly conducting piece of material that experiences no external effects from the environment and applies no external effects to its environment but this is not the reality.
Traces on a PCB that connect different components are not pure perfect conductors so they have a small unwanted resistance to them. Current flowing through a wire produces a magnetic field around it which makes the trace/wire a tiny inductor. A trace (or any conducting material) on a PCB is also a capacitor since there are many other conductive surfaces near it at a different voltage level with a dielectric in between it that behaves like an unwanted capacitor.
These are called parasitic elements since they are unwanted and are not intentionally put in the design, but in high speed PCBs these parasitic elements need to be accounted for.
Typically in a PCB, you have an IC or some load that is switching often. This means that your circuit/PCB can very quickly go from not needing any current to all of a sudden needing current. Remember that an inductor resists sudden changes in current and you can see why this becomes an issue if all your traces that lead to places on your PCB have inductance on them. When your circuit turns on or switches all of a sudden, the circuit will all of a sudden need an inrush of current. To counteract this, we use decoupling capacitors. A capacitor acts like a small battery which stores charge closer than your actual power supply that goes into the board.
Based on the following information, what can you deduce about the best placement for a decoupling capacitor? Should the decoupling capacitor be placed in position A close to the input power supply or in position B close to the IC that we are trying to power? Think about this when you do placement for your LDO board and the priority of each of the components.
When dealing with digital or analog circuits, we have to remember that signals that travel on PCB traces are actually compositions or sums of a bunch of sinusoidal signals. The image below shows that a square wave that could easily be a clock signal or some data is made up of a bunch of different sine waves with different amplitudes and frequencies. A simple step function may seem like a super low frequency function because it happens once, but the reality is that the step function is actually a sum of multiple higher frequencies and so the rise time (the time it takes for an edge to rise from 0V to its intended voltage because a square rising edge is never actually instant) is closely related to the frequencies involved in the rising edge.
This means that we need to be careful of inductance and capacitance since they affect the impedance of our PCB traces and impedances are frequency dependent. The equation for impedance can be seen below. This equation in the context of a PCB trace is basically saying that the resistance to the AC part of your signal is composed of the regular DC resistance of a trace plus some inductive reactance - capacitive reactance value.
This leads us to return currents. The diagram below shows 5V coming into a board, following the red line, going into the IC and returning to GND on the yellow path through a ground layer in the PCB board. This all makes sense, the current is taking a path through the 5V copper trace and then the shortest path back to GND since a yellow diagonal line is the shortest path that minimizes resistance.
This is all fine, but we are making some large assumptions here. This yellow return current looks fine for low frequencies (slow changing voltages), but sometimes the path that return current takes is not always the shortest path, its the path with the lowest impedance. The diagram above shows that there is capacitive coupling between the 5V trace and the ground layer beneath it. This makes sense, there is essentially a capacitor there since it is a 5V difference with a dielectric between it.
Remember that there is always parasitic capacitance and parasitic inductance. When current travels through copper it generates a magnetic field and this causes some small amount of inductance.
If we take a look at the diagram below, we can analyze the return current path under two situations: low frequency and high frequency signals. The diagram below shows a 5V copper trace on the top layer shown in red that goes to an IC. A via on the other side of the IC attaches it to the ground layer underneath. Underneath is an entire copper ground layer and the yellow and blue lines show different return currents on the ground layer beneath the red trace layer.
At low frequencies, impedance is smallest at the yellow return path since inductance plays less of a role at low frequencies. At high frequencies, the inductance in the yellow path increases the impedance. The blue return current path shows that there is capacitance between the 5V trace and the GND layer underneath it. Looking at the impedance equation we can see that this actually decreases the total impedance as the reactance of the capacitance counteracts the reactance of the inductance and this means that the overall impedance is lower than the yellow path.
So at higher frequencies, return currents tend to follow the trace.
Another simulation example can be seen below of current in the ground plane underneath a U-shaped trace. At low frequencies, the GND return current is determined by the shortest path that minimizes the DC resistance R. The higher the frequency, the more the signal current path follows the trace. Remember how we discussed earlier that a square wave is actually composed of many frequencies and the sharper the square wave the higher the frequency. So even a system that doesn’t have any fast oscillating sine waves still likely has some rising edges in its system which means that this effect of return current still applies in most circuits.
So what happens if there's no ground near/underneath our signal? The diagram below demonstrates this. It shows a black trace on a top layer made of copper going from the connector and into a resistor which then goes down a via into the green ground copper layer. The red loop shows the current path from the connector input, through the black copper trace and the return current path that the current takes on the ground layer.
If we have a split in the ground plane or no nearby ground for return current to come back, it will have to take a longer route which creates something called a larger current loop.
Remember that current that travels in a loop creates a magnetic field so a constantly changing current creates a constantly changing magnetic flux through the loop area. Also remember that a constantly changing flux in a loop of wire creates a constantly changing current in the loop of wire.
The conclusion essentially is that a larger current loop radiates and absorbs more electromagnetic noise which can affect the ICs on your PCB as your traces that contain data can become distorted and noisy. Radiating electromagnetic noise is also a bad thing for other boards nearby.
Practically this means you should always have ground near your traces (or just a ground plane underneath all your traces) so that you have a return current close to your current entering the board and that you should always attempt to make your current loops as small as possible.
2 - Altium
In the previous part of the bootcamp, you validated your schematic and you are ready to move on to transferring your schematic onto an actual PCB drawing that can be sent to a manufacturer.
The next step is to ensure that you have an actual PCB file in your project. Click File>New>PCB.
You should get a large black empty square on your screen which is your empty PCB.
The next step is to define your board layers.
Click Design>Layer Stack Manager.
A page similar to the one below should appear. This is where you define the layers of your board. As you can see, there is a top overlay for silkscreen, a top solder mask layer and then your copper and dielectric layers sandwiched between more solder mask and bottom overlay. This is the layer stackup for a 2 layer board. Clicking Add will allow you to add more layers to your board. Keep in mind however that adding more layers to your board increases cost and manufacturing time so its optimal to try to design a board using as few layers as possible.
You can also change the layer thicknesses in the board stack manager. Typically you will want to check with your manufacturer what layer sizes they have and select based on that but for the purpose of this board its fine to leave the layers thicknesses are they are right now. It is up to you however to decide how many layers you will need.
There are two approaches for the next step. We can either decide our board shape right now, or we can place our components on the PCB and then define our board shape after. If there is a target board shape then its best to go the first route but if the board shape is not critical, it’s best to place our components first and then define our board shape after.
Clicking Design>Update PCB Document… will update any changes you made on the schematic to the PCB document as well as place all the footprints of your components on the board.
Your component footprints will be placed randomly and so this is the part where you will do your component placement. The photo below is a random placement, but you want to drag your components around on the board and place them in the configuration you want.
The board below shows the component placement for a buck converter board but its at this point where you want to consider how you’re gonna route your traces which are the “wires” of copper on your board that connect your components. It’s also at this point where you want to be considering critical placement of input capacitors and output capacitors in relation to your LDO IC. Where are you going to put your feedback resistors? How far away do you place input and output connectors? Am I going to have large current loops? All of these are questions that you should be asking as you place your components.
After you’ve finished your placement, the next step is to route your traces and place your polygons and also place your vias.
Traces: Lines of copper that transmit signal or power from component to component
Polygons: Shapes or geometries that are filled in with copper that are used to connect a large number of components or transmit a lot of power
Vias: Conductive through holes that can connect polygons and traces across different layers of your board
To route a trace that connects a component, select the Interactively Route Connections button at the top
This will allow you to click and start a trace and essentially draw a trace out to connect your footprints/pads/components.
The full Altium page that describes all the functionality around routing in Altium can be found below:
https://www.altium.com/documentation/altium-designer/interactive-routing-pcb
One thing to be aware of when routing components is to make sure the trace or polygon you are placing is associated with the correct net. Altium will not allow you to make a connection between two pads or pieces of copper if they are not assigned to the same net (which is just an identifier for the node in the schematic that the connection is a part of)
Always ensure in the properties panel that the correct net is selected.
To create polygons, select the Place Polygon Plane on the top menu bar. This will allow you to draw out a shape that will be filled in with copper.
Similarly to traces, it is important to define the net that the polygon is associated with. If you make any changes to the shape of the polygon or change a setting in the properties tab, the polygon will show an error in the form of many green circles in a grid. Be sure to select Repour whenever you make a change to a polygon.
Going to Tools>Polygon Pours>Polygon Manager reveals all the polygons in your board and it in this menu that you can shelve polygons (temporarily remove them) and also reorder the priority of each polygon pour. For a more detailed overview on polygons, follow the link below:
https://www.altium.com/documentation/altium-designer/pcb-polygon-pour?version=18.1
In order to place your vias, select the Place Via button on the top menu bar. This will allow you to place your through hole vias anywhere you like on the board. Just note vias need a net to be selected in the same way as traces and polygons. Also, placing a via on an already poured polygon will require you to repour the polygon.
One thing to be aware of is your via sizes. Vias are small drilled holes with copper plating so its important to define the Diameter and Hole Size in the Properties tab of the via.
The last step is to define your board outline. This can be done by selecting any mechanical layer, using the Place Line tool at the top menu to create a closed shape as shown below.
Next select the lines of the shape you created, and select Design>Board Shape>Define Board Shape From Selected Objects.
You should be left behind with a board in the shape you defined.
With this, you are ready to place your components, route your components, place your polygon pours and vias, and then define your board shape.
A random example board is shown below. It is a 2 layer board where the top layer is denoted in red and the bottom layer is blue. You can see all the pads for each component and also green arrows that point to vias that are used to make connections across the two layers.
3 - Conclusion
At this point you should have completed the WARG EE bootcamp. Your only deliverable is your LDO PCB board that you will need to present to an electrical team lead (Michael Botros or Ethan Abraham) in discord.
Well done for getting this far!
After your board has been reviewed and approved, please follow the instructions on this link.