SDMMC SD Card

SDMMC Peripheral

The STM32 Nucleo L552ZEQ contains a hardware peripheral called the SDMMC which allows for rapid data transfer to an SD card. SDMMC has 4 data lines (DAT0-3) and requires a clock signal. 1 clock cycle = 1 byte of data transferred on a SDMMC data line.

From the high level block diagram you can see the following:

• AHB contains a built-in DMA module automatically managed by the SDMMC hardware

• SDMMC adapter is what actually talks to the SD card, the control unit produces a clock signal SDMMC_CK to the SD card calculated by the input clock SDMMCCLK (configurable in .ioc file)

  • in the .ioc file a division factor of 0 means SDMMC_CK = SDMMCCLK

• Clock divider of 0 and SDMMCCLK of 8 MHz means 8 MB/s data transfer rate over each SDMMC data line

FATFS Library

• FATFS is a file system library that allows for file management on the SD card

• It requires a couple of low level functions specific to the hardware platform in order to operate

  • See

    sd_diskio.h, bsp_driver_sd.h

• File names by default are 8.3 format (max 8 character file name, max 3 character file extension)

• There are two utility functions written the abstract over the FATFS API, one for reading, one for writing found in log_util.h

  • FRESULT logWrite(char*, void*, UINT, UINT*); 
    FRESULT logRead(char*, void*, UINT, UINT*);

Links

SD Drivers PR: https://github.com/UWARG/efs-zeropilot-3.5/pull/45

SD Drivers these drivers were based on: https://github.com/alireza-montazeri/STM32_SD_FATFS_freeRTOS/blob/master/FATFS/Target/sd_diskio.c

SDMMC Docs: https://www.st.com/content/ccc/resource/training/technical/product_training/group0/05/50/05/98/5a/39/44/5e/STM32L5-Peripheral-SDMMC_interface_SDMMC/files/STM32L5-Peripheral-SDMMC_interface_SDMMC.pdf/_jcr_content/translations/en.STM32L5-Peripheral-SDMMC_interface_SDMMC.pdf

HAL Docs for STM32 Nucleo L5: https://www.st.com/resource/en/user_manual/um2659-description-of-stm32l5-hal-and-lowlayer-drivers-stmicroelectronics.pdf