SDMMC SD Card

SDMMC Peripheral

The STM32 Nucleo L552ZEQ contains a hardware peripheral called the SDMMC which allows for rapid data transfer to an SD card. SDMMC has 4 data lines (DAT0-3) and requires a clock signal. 1 clock cycle = 1 bit of data transferred per SDMMC data line. SDMMC can be configured to use 1 or 4 data lines. 1 data line is slow but has less risk of corrupted data even at high clock speeds, 4 data lines is faster but has more risk of corrupted data at high clock speeds.

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From the high level block diagram you can see the following:

  • AHB contains a built-in DMA module automatically managed by the SDMMC hardware

  • SDMMC adapter is what actually talks to the SD card, the control unit produces a clock signal SDMMC_CK to the SD card calculated by the input clock SDMMCCLK (configurable in .ioc file)

    • in the .ioc file a division factor of 0 means SDMMC_CK = SDMMCCLK

  • Clock divider of 0 and SDMMCCLK of 8 MHz means 8 Mbits/s data transfer rate over each SDMMC data line

FATFS Library

  • FATFS is a file system library that allows for file management on the SD card

  • It requires a couple of low level functions specific to the hardware platform in order to operate

    • See

      sd_diskio.h, bsp_driver_sd.h
  • File names by default are 8.3 format (max 8 character file name, max 3 character file extension)

  • There are two thread-safe utility functions written the abstract over the FATFS API, one for reading, one for writing found in log_util.h. The return values are error codes from the FATFS API calls performed inside the utilities, the utility function call will abort with an error code if any FATFS API calls fail.

    • FRESULT logWrite(char*, void*, UINT, UINT*); FRESULT logRead(char*, void*, UINT, UINT*);

Debugging

  • Ensure SD cards are formatted using MS-DOS (FAT32) using MBR (Master Boot Record)

  • Ensure SD card is <= 32GB in capacity

  • Ensure the clock for SDMMC is set according to your SD card transfer speed, (i.e. if your card is rated for minimum 10 Mbytes/s write speed, set the SDMMCCLK to just under that, something like 20MHz with 0 clock divider)

    • The clock source for SDMMC is clock48 which generates a 48MHz clock, we need to apply a clock divider of 2+ to lower the clock down to reasonable value for a 10 Mbytes/s rated SD card.

  • Test your SD card in 1 data line mode if 4 data line mode is not working as this mode is more reliable than 4 data line mode.

  • Ensure file names follow 8.3 format

  • All FATFS function calls return a FRESULT error code, printing them out is helpful

Links

SD Drivers PR: SDMMC SD Card Drivers by lekangwang · Pull Request #45 · UWARG/efs-zeropilot-3.5

SD Drivers these drivers were based on: STM32_SD_FATFS_freeRTOS/FATFS/Target/sd_diskio.c at master · alireza-montazeri/STM32_SD_FATFS_freeRTOS

SDMMC Docs: https://www.st.com/content/ccc/resource/training/technical/product_training/group0/05/50/05/98/5a/39/44/5e/STM32L5-Peripheral-SDMMC_interface_SDMMC/files/STM32L5-Peripheral-SDMMC_interface_SDMMC.pdf/_jcr_content/translations/en.STM32L5-Peripheral-SDMMC_interface_SDMMC.pdf

HAL Docs for STM32 Nucleo L5: https://www.st.com/resource/en/user_manual/um2659-description-of-stm32l5-hal-and-lowlayer-drivers-stmicroelectronics.pdf

FATFS Docs: http://elm-chan.org/fsw/ff/

FATFS Driver unit tests: http://elm-chan.org/fsw/ff/res/app4.c