architecture diagram
Main Computer
Driver
a nucleo board
enumlate real signal format (PPM, GPS) from TEST case UART input
inface with TestCase using 1 UART port
have parallel port connecting to DUT (signal)
Driver have a buffer to store UART data
sequence diagram
Interface design:
Main computer → driver
1 uart will be enough because nucelo is just for single purpose no calculation
Data Packet Format
receiver → Main computer
1 uart will be enough because nucelo is just for single purpose no calculation
Data Packet Format
main computer(Test Case) ← main computer (
the interface between computer and driver
option 1: computer send the data at a fixed frequency
option 2: when nucleo
Question:
How to display the assertion?
reach goal
GDB-like debugger that explain where it went wrong in the code base in DUT
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