Integrated Load Switches
Introduction
Integrated load switches are electronic switches that can be used to turn on and turn off power supply rails in systems. These devices offer many system benefits including protection features that are often difficult to implement with discrete components. Integrated load switches are commonly found in applications such as those listed below:
Power Distribution
Power Sequencing and Power State Transition
Reduced Leakage Current in Standby Mode
Inrush Current Control
Controlled Power Down
Basic integrated load switches consist of four pins:
Input Voltage
Output Voltage
Enable
Ground
When the device is enabled via the ON pin, the pass transistor turns on, thereby allowing current to flow across from the input pin to the output pin. Power is thus passed to the downstream circuitry.
Block Diagram
Understanding the general architecture of an integrated load switch will aid in determining its relevant specifications. Shown below is a block diagram of a basic integrated load switch. This block diagram is comprised of five basic blocks. Additional blocks may be included to add to the functionality of the device.
Pass FET: The pass FET is the main component of the load switch. This component determines the maximum input voltage and maximum load current the load switch can handle. The on-state resistance of the pass FET is a crucial characteristic of the load switch and is used to determine conduction loss. The usage of an n-channel or p-channel FET governs the architecture of the load switch.
Gate Driver: The gate driver charges and discharges the gate of the FET in a controlled manner, thereby controlling the rise time of the device.
Control Logic: The current logic is driven by an external logic signal. It controls the turn-on and turn-off of the pass FET and other blocks, such as quick output discharge, the charge pump, and blocks with protection features. This external logic signal is commonly connected directly to an external microcontroller.
Charge Pump: The charge pump is implemented in n-channel integrated load switches to achieve the needed positive differential voltage between the gate and source terminal.
Quick Output Discharge: This block is comprised of an on-chip resistor from VOUT to GND that is turned on when the device is disabled via the ON pin. This will discharge the output node, preventing the output from floating. For devices with quick output discharge, this feature is only present when VIN and VBIAS are within the operating range.
Additional features of integrated load switches include thermal shutdown, current limiting, and reverse polarity protection.
Datasheet Parameters
Below is a list of common datasheet parameters and definitions for load switches.
Input Voltage Range (VIN): The range of input voltages that the load switch can support
Bias Voltage Range (VBIAS): The range of bias voltages that the load switch can support. This may be used to power internal blocks of the load switch but ultimately depends on the architecture.
Maximum Continuous Current (IMAX): The maximum continuous DC current the load switch can support. System thermal performance plays a key role in determining the maximum continuous DC current in a system.
On-state Resistance (RDS(ON)): The resistance measured from the VIN pin to the VOUT pin.
Quiescent Current (IQ): The required amount of current to power the internal blocks of the device, measured as the current flowing into the VIN pin without any load on VOUT
Shutdown Current (ISD): The amount of current flowing into VIN when the device is disabled.
ON Pin Leakage Current (ID): The amount of current flowing in the ON pin when the ON pin has a HIGH voltage applied to it.
Pull-down Resistance (RPD): The value of the pull-down resistor from VOUT to GND when the device is disabled (resistor used for quick output discharge).
Applications
Power Distribution
Load switches can be used to turn on and off sub-systems of the same input voltage when needed. By using a load switch, power can be distributed across different loads with unique control for each one.
Power Sequencing and Power State Transition
In some systems, strict power-up sequences must be followed. By using a GPIO or I2C interface, load switches can be used to implement power sequencing to adhere to power-up requirements. Load switches can provide independent control of each power path to provide simplified point-of-load control for power sequencing.
Reduced Leakage Current
Oftentimes, sub-systems are intended to only be used during certain modes of operation. Load switches can be used to limit the amount of leakage current and power consumption by turning off power to these sub-systems. The figure below shows a comparison of leakage current with and without a load switch.
Circuitry such as DC/DC converters, LDOs, and modules can be disabled and put into standby mode. The leakage current of these modules can be quite high, even during the shutdown state. Placing a load switch before the load can reduce the leakage current significantly. Thus, power consumption can be reduced significantly with a load switch placed in the power path.
Inrush Current Control
The input rail may sag because of inrush current when turning on a sub-system without any slew rate control. This inrush current is induced from quickly charging a load capacitor. Load switches resolve this issue by controlling the rise time of the output voltage.
Controlled Power Down
When a DC/DC converter or LDO without quick output discharge turns off, the load voltage is left floating and power down timing is dictated by the load. This can cause unwanted activity as modules downstream are not powered down to a defined state.
Using a load switch with quick output discharge can mitigate these problems. The load will be powered down quickly in a controlled manner and will be reset to a known and stable state for the next power up. This eliminates floating voltages at the input of the load and ensures that the load remains in a defined power state at all times.
Protection Features
Integrated load switches can be designed with implemented fault protection features. These include:
Reverse Current Protection: This prevents current from flowing to the VIN pin from the VOUT pin.
ON Pin Hysteresis: Allows or more robust GPIO enable. With a voltage difference between a logic level high and logic level low on the ON pin, the control circuitry will operate as intended when there is noise along the GPIO.
Current Limiting: This feature limits the amount of current the load switch will output. This reduces excessive current draw.
Under-voltage Lock-out (UVLO): This turns off the device if the VIN voltage drops below a threshold value, ensuring that the downstream circuitry is not damaged by being supplied by a voltage lower than intended
Over Temperature Protection: This disables the switch if the temperature of the device exceeds a specific threshold temperature.
Lower BOM Count and PCB Area
An integrated load switch greatly reduces the BOM count and PCB area of a system in comparison to a discretely designed load switch.
Pass FET Considerations
NMOS
With an NMOS device, the pass FET is turned on by bringing the gate voltage above the source. Usually, the source voltage (VOUT) is the same potential as the VIN terminal. To create this voltage differential between the gate and the source, a charge pump is needed. This component increases the quiescent current of the device
PMOS
with a PMOS device, the pass FET is turned on by bringing the gate voltage below the source voltage. The architecture of a PMOS device does not require a charge pump, resulting in a lower quiescent current in comparison to using an NMOS device.
PMOS devices do not perform as well as NMOS devices at lower voltages.
Voltage Drop
To determine an appropriate device for an application, it is necessary to understand how much voltage drop across the load switch is acceptable. The lower the acceptable drop, the lower the RDS(ON) of the load switch must be.
Note that VOUT - VIN should be calculated as the maximum possible voltage drop across the two terminals.
Inrush Current
Inrush current is generated by the turn-on speed of the pass FET and the load capacitor.
The value of the inrush current is determined by the total capacitance on VOUT and the rate of change of the VOUT voltage. It is important to ensure that the rise time of the load switch such that the device does not exceed maximum specifications. Some devices have a separate CT pin which allows the rise time to be programmed with an external capacitor from the CT pin to GND.
Power Dissipation
The input voltage and load current is necessary to calculate the power dissipated in the load switch.
Thermal Considerations
The maximum IC junction temperature should be restricted to the maximum junction temperature as indicated on the absolute maximum table under normal operating conditions.
Here TJ(max) is the maximum allowable power dissipation, TA is the ambient temperature of the device, and θJA is the junction to air thermal impedance (highly dependent on the board layout).
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