Decoupling Capacitors
- Daniel Puratich
Introduction
For decoupling capacitors see: Decoupling capacitor . Though I will elaborate: Perfect conductors do not exist. Every conductor is a small RLC circuit, this is explained a bit more in Transmission line theory. Digital electronics do not draw consistent amounts of current. In order for them to send out a signal (drive an output) they need to theoretically instantaneously (in reality very quickly) change the amount of current they're driving (a high di/dt). In order to compensate for the fact that the copper conductor used to bring that IC is inductive we need to place a capacitor close to the power input of an IC that can provide that current. This boils down to having a low impedance source (even at higher frequencies) for the power pins. Without a decoupling capacitor the input voltage to the device itself could fluctuate outside of it's operating range during these moments where the device has a high di/dt on it’s power inputs even though when you oscilloscope the power traces elsewhere on the board they look stable. With a decoupling capacitor the capacitor can provide some of the current and mitigate the inductive effects of the copper traces/plane. In implementation you get chips that look like this (from our flight controller) where the orange ones are mostly decoupling capacitors (some are for analog filtering though) to help the micro launch it's signals.
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Question and Answer
Why in the examples they put the decoupling caps right next to the LR1121 s and each IC has dedicated caps instead of one big bank for the whole power rail?
Lower loop inductance when the capacitors are closer to the pins results in lower impedance at higher frequencies. Keeping the impedance low across a larger portion of the frequency spectrum is the justification for having multiple values/packages all placed nearby (with the smaller package and lower capacitance values being closest).
If the manufacturer datasheet for an IC doesn't specify a decoupling capacitor value, what value should I use?
Rule of thumb for small simple ICs is a single 100nF in a small package. However, the rule of thumb only gets you so far and doesn’t work in all cases. This rule actually came about because before we had chip capacitors 100nF was the most capacitance you could get in a low inductance package. A Power Distribution Network (PDN) is extremely layout dependent as well.
How should I place decoupling capacitors in a layout for an IC?
Follow the manufacturer datasheet for the IC if it specifies and you’re unsure.
Lower capacitance and smaller package capacitors should be closer to the IC power pins.