STM32H747 Application Notes

https://www.st.com/resource/en/application_note/an4938-getting-started-with-stm32h74xig-and-stm32h75xig-hardware-development-stmicroelectronics.pdf

https://www.st.com/resource/en/application_note/dm00606249-getting-started-with-stm32h7a37b3-line-and-stm32h7b0-value-line-microcontroller-hardware-development-stmicroelectronics.pdf

Power Supplies

VDD

• Decoupling caps:

  • One single tantalum or ceramic cap (of 4.7uF minimum capacitance) for the entire package

  • 100nF ceramic capacitor for each VDD pin

Independent Analog Supply and Ref Voltage

• Follow reference schematic for VDDA, VSSA, VRef+ and VRef-

  • two external decoupling capacitors for VDDA (100nF ceramic capacitors and a 1uF tantalum or ceramic capacitor)

  • two external decoupling capacitors for VRef+ (100nF ceramic capacitors and a 1uF tantalum or ceramic capacitor)

  • VDDA can be connected to VDD through a ferrite bead

  • VREF+pin can be connected to VDDA through a resistor (typically 47ohms)

USB Transceiver Independent Power Supply

• Follow reference schematic for VDD50USB and VDD33USB (tied together)

  • two external decoupling capacitors (a 100nF ceramic capacitor and a 1uF tantalum or ceramic capacitor)

  • Currently missing a 100nF

• So: allow for an external 5V (from BMS/PDB) and a VDD_MCU (3V3 from regulator)

Battery Backup Domain

• Do we want an external coin battery? NO, for now

  • If so, follow reference schematic and introduce a jumper to allow switching between 3V3 and battery holder

  • If not, we can just directly connect to VDD (no need for jumper)

• Investigate current injection?

LDO Voltage Regulator

• Follow ref schematic for:

  • VDDLDO

    • VDDLDOx pins must be connected together

    • Must be connected to a 4.7uF tantalum or ceramic capacitor

  • VCAP (add the suggested capacitors)

    • Both VCAP1 and VCAP2 must be connected to 2.2uF ceramic capacitor with a low ESR (<100mOhms)

    • Recommended to connect VCAP1 pin to VCAP2

    • Since VCAP3 is available, must be connected to the other VCAP pins, but additional caps are NOT required

SMPS step-down converter

• Do we want to use it? How do we use the pins?

  • VDDSMPS, VSSSMPS, VFBSMPS, VLFXSMPS

• Select a mode from here

  • https://www.st.com/resource/en/application_note/dm00606249-getting-started-with-stm32h7a37b3-line-and-stm32h7b0-value-line-microcontroller-hardware-development-stmicroelectronics.pdf

Internal DSI Regulator

• Does not seem that we need/will use it

• https://community.st.com/s/question/0D53W000012VQYQSA4/stm32l4r9zij6-dsi-pin-connections-if-dsi-funtion-not-used

Internal Power Supervisor

• Hold PDR_ON high to enable (using pull up resistor)

Clocks

HSE (High Speed External Clock) oscillator clock

• Follow ref schematic:

  • crystal/ceramic resonator

    • Using a 25 MHz oscillator frequency is a good choice to get accurate Ethernet, USB OTG high-speed peripheral, I2S and SAI

  • 2 load capacitors

    • For CL1 and CL2 it is recommended to use high-quality ceramic capacitors in the 5 pF to 25 pF range (typical), designed for high-frequency applications and selected to meet the requirements of the crystal or resonator

    • CL1 and CL2, are usually the same value.

    • The PCB and MCU pin capacitances must be included when sizing CL1 and CL2 (10 pF can be used as a rough estimate of the combined pin and board capacitance).

  • Should be as close as possible to pins (PH0-OSC_IN and PH1-OSC_OUT)

LSE (Low Speed External Clock) oscillator clock

• crystal/ceramic resonator

  • LSE crystal is a 32.768 kHz low-speed external crystal or ceramic resonator. It has the advantage of providing a low-power, but highly accurate clock source to the real-time clock peripheral (RTC) for clock/calendar or other timing functions.

• 2 load capacitors

  • CL1 and CL2, are usually the same value.

  • The PCB and MCU pin capacitances must be included when sizing CL1 and CL2 (10 pF can be used as a rough estimate of the combined pin and board capacitance).

• Should be as close as possible to pins (PC14-OSC32_IN and PC15-OSC32_OUT)

Boot Configuration

• Follow ref schematic

• https://itectec.com/electrical/electronic-stm32-programming-and-boot0-pin/

  • As mentioned this post, we can connect the BOOT pin to both ground and 3V3 through two resistors, and only populate the one we want to use (use 10k resistors to pull up or down)

Debug Management

SWJ Debug Port (Serial wire and JTAG)

• Serial Wire / JTAG Debug Port (SWJ-DP)

• an ARM® standard CoreSight debug port that combines a 5-pin JTAG-DP interface and a 2-pin SW-DP interface

• The JTAG Debug Port (JTAG-DP) provides a 5-pin standard JTAG interface to the AHP-AP port.

• The Serial Wire Debug Port (SW-DP) provides a 2-pin (clock + data) interface to the AHP-AP port.

• Pins

  • PA13, PA14, PA15, PB3, PB4

• Connect pins to a standard JTAG connector as shown in ref schematic

TPIU Trace Port

• Trace connector should be located as close as possible to micro

•