12 to 24V Boost Convertor Board

Background:

• For powering our 24V battery charger

  • would be massive help at comp and flight tests to be able to charge faster

• Supply enough power for the charger

  • if the current is really high then this project is going to be waaay out of our skill range

• Why

  • We have 12V server PSUs that are CSA approved

  • We get more power capability out of the charger at 24V

Requirements:

• Receive 12V input from PSUs, output 24V

• 22A max output current

• Cost

  • Not sure if this is that much of a concern

  • The COTS option we identified was ~$100 off AliExpress, we can aim to do lower than that, but not a primary goal

Topology:

• Due to the high power requirement, it may be best to design the board using the interleaved multiphase boost topology:

  • Essentially several boost convertors operating in parallel, out of phase with each other (their on/off switching alternates)

  • While one phase ramps up current, the other phase ramps it down.

  • Output current being split between multiple phases reduces power losses, which makes this more efficient than a single phase boost convertor. We may not need a heatsink

• Example of a six-phase interleaved boost convertor: PMP31073 reference design | TI.com

20-TSSOP Land Pattern | NXP Semiconductors

@everyone

Recommendation from @Andrew Chai go with less inductance and more capacitance

Plan is to select an IC and then start all the math & calculations to find values of components

• AN-1820 LM5032 Interleaved Boost Converter (Rev. A)

• Take a look from Section 4 onward on these interleaved boost convertor notes

• What is our minimum and maximum input voltage?

• @Tim Gu figure out what the duty cycle needs to be

  • Idea of what ripple current is - Andrew suggested 50-200mA

  • Based on that, @Thuvaragan Prathifkumar have a look at inductor selection

    • Read over section 5

  • MOSFET research (Use Andrew’s notes from 12S ESC 3-phase inverter) @Daniel Rolinsky

    • Section 8

  • Input and output capacitor research @Himansh Garg

    • Consider ripple current

    • Capacitor ESR

    • Sections 6 and 7

• Inductor (very important)

  • consider choosing a bigger one because we’re making a groundside board, not worried about weight

• Capacitor

• MOSFET

  • threshold gate to drain (ON) voltage

  • max drain to source voltage (Vin-Vout), around 24 V

  • drain to source threshold voltage

  • thermal impedance coefficient - Rds(on) is an important value and should be kept pretty low (few dozen milliohms)

  • Task: Look at the notes on 12S ESC MOSFET conduction/gate charge losses

    • We can make a similar table to compare options

  • how much power is it rated for and how much power dissipated according to thermal impedance? (degrees celsius risen per watt)

• Current sense (probably copying Hall effect sensor from other boards)

• Overvoltage protection?

• Heatsink might be needed

Simulate stuff before designing it

• input filter simulation?

• making sure our board doesn’t blow up on connection

• From Basic Calculation of a Boost Converter's Power Stage (Rev. D)

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12V server PSU used to power our boost convertor: Supermicro PWS-741P-1R datasheet

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• 12V nominal PSU voltage, +/- 5% regulation

  • Min Vin to boost convertor: 12V x 0.95 = 11.4 V

  • Vout = 24V

  • Use η = 90%, estimate for worst case efficiency

    • This would mean a lot of power dissipated (big heatsink), we’ll aim for higher efficiency than this

  • Dmax = 57% for Vmin

  • Dmin = 53% for Vmax

  • (INITIAL ESTIMATES)

Inductors

@Thuvaragan Prathifkumar

• Based on the guidelines for interleaved boost component selection (LM032 IC) our estimate is looking to be something like ~6.1uH

We’re designing with LM5122 - calculate again with the equations for this specific IC (take into account 2x phases)

• Ripple ratio (RR) we are estimating between 0.2-0.4 (fraction of output current)

Inductance:

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• V_in = 12V

• V_out = 24V

• f_sw = 250 * 10^3 Hz

• ripple ratio (RR) = 0.3 (estimating as 0.3 since between 0.2 and 0.4)

• I_in = 24.44A

  • Don’t have this value so:

    • efficiency = 90% (may have to adjust)

    • P_out = V_out * I_out = 24V * 22A = 528W

    • P_in = P_out/efficiency = 528/0.9 = 586.67W

    • I_in_total = P_in/V_in = 586.67/12 = 48.89A

    • I_in (accounting for each phase (n=2)) = 48.89/2 = 24.44A

L_in = (12/(24.44 * 0.3)) * (1/(250 * 10^3)) * (1- (12/24)) = 3.273 μH

Saturation current:

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I_peak = 24.44 + (1/2) * ((12/((0.00000327332) * (250 * 10^3))) * (1- (12/24)) = 28.11A

Component Choices

• Based on Figure 2 from AN-1820 LM5032 Interleaved Boost Converter (Rev. A),

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• In continuous conduction mode (CCM) the inductor current always remains above 0.

• In discontinuous conduction mode (DCM) the inductor current drops to 0 in between PWM pulses when the switch is off. This can happen when duty cycle is too low or inductance value is too (low inductance --> di/dt is greater, current will drop faster)

• The boundary condition refers to when the duty cycle, inductance and other parameters are set in a way that the inductor current touches 0 right when the next PWM pulse begins (at the moment the switch turns back on)

We are probably going to operate fully in CCM? I’m aware most boost convertors operate in this mode.

• Are there any significant pros/cons of choosing our inductor value so that we operate in CCM? vs DCM? vs boundary?

• The switching frequency of our IC is programmable up to 1 MHz. This is how fast the controller will be switching the MOSFETs on/off

  • this affects things like switching power losses from MOSFETs, and electromagnetic interference (EMI)

  • Will determine how we make upcoming design decisions

• What should we choose as our switching frequency?

Resources consulted

How to Choose the Frequency of Your Switching Regulator - Technical Articles:

Microsoft PowerPoint - Effects of High Switching Frequency on Buck Regulators.ppt [Read-Only]

• Higher switching frequency decreases convertor efficiency

  • MOSFETS are switching on/off more often → higher switching losses

• Higher switching frequency allows for smaller components to be used → can make smaller PCB, less cost

  • If the noise/interference from our board is higher frequency, then smaller filter capacitors/inductors can be used

  • Our board is groundside, so making the board smaller isn’t a concern

• Higher switching frequency decreases ripple amplitude of output voltage

Based on these considerations, lower frequency would be better to prioritize efficiency so we can dissipate as little power as possible.

Switching Frequency of other LM5122 reference designs

PMP31073 Reference design board - six phase interleaved boost, uses 200kHz switching frequency:

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PMP11112 Reference design board - four phase interleaved boost, uses ~280kHz:

• Calculation from graph: Period ~= 3.6 divs x 1us/div = 3.6us

  • 1/3.6us ~= 280 kHz

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Lower switching frequency around the 200-300 kHz range seems to be the standard for high efficiency (and higher current) applications.

We’ll choose 250kHz as an initial starting point.

Our boost convertor should have high efficiency so that we don’t need to dissipate so much heat.

Toshiba Notes on MOSFET Selection

AN-1962 LM5032 Interleaved Boost Evaluation Board (Rev. A) - Section 8

Calculating MOSFET power loss

Using normalized thermal resistance graphs

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t value is how long the MOSFET is ON

Switching frequency 250 kHz

Total period (t_on + t_off) = 1/250k

Duty is 50% (t_on = 1/2 period)

→ t_on = 1/500k = 2μs

Visual for ‘high-side' and ‘low-side’ switches:

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Instead of a diode, a high-side switch is used in synchronous boost topologies for efficiency.

Losses from high-side MOSFET:

1. Conduction loss

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2. Dead-time loss aka transition loss

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• t_DLH → time from when low-side switch falls to when high-side switch rises

• t_DHL → time from when high-side switch falls to when low-side switch rises

• these can be found in electrical characteristics section of datasheet

3. Reverse recovery loss aka gate charge loss

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Losses from low-side MOSFET:

1. Conduction loss

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2. Switching loss

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MOSFET Comparison.xlsx

Selected FET:

BSZ018N04LS6ATMA1 Infineon Technologies | Discrete Semiconductor Products | DigiKey

• Optimized for synchronous rectification (exactly what we’re doing with high and low-side FETs instead of diodes)

• very low Rds_on (1.6mΩ) at 10V gate drive → low conduction losses

• Rise time is super low (1.6ns) compared to other FETs → low switching losses on low-side

Purpose

• Bulk capacitance at the output → prevent the output voltage level from dropping too low when current is not available

• Limit voltage ripple at the output → provide a 24V DC output that is as stable as possible

  • Undesirable effects of voltage ripple:

    • Wasted power

    • It heats components

    • Causes noise and distortion

    • May cause digital circuits to operate improperly

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• Output Cap Comparison.xlsx

Selected cap: A785MW157M1JLAV013

• Aluminum polymer

• 150uF, 3 will be used in parallel → limits ripple to ~70mV

• Low R_ESR → 13mΩ

• Long lifespan (1000 hours @ 150°C

Aluminum Polymer vs Aluminum Electrolytic Capacitors

Example calculation:

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V_CS-TH1 - Cycle-by-cycle current limit threshold voltage = 75mV

At max 22A load, input current for each phase (assuming 90% efficiency) is 24.45A

Using 40% margin:

R_s = 75mV/(24.45 * 1.4) = 0.00219 Ω

• 2.2mΩ

P = I^2 * R = 24.45^2 * 2.2mΩ = 1.315 W → sense resistor should be rated > 1.315 W

• Selected component: WSLF25122L000FEA Vishay Dale | Resistors | DigiKey

• 2.2mΩ 5W 1% $1.57

Useful theory: Understanding and Applying Current-Mode Control Theory

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L_IN = 3.3uH

R_SLOPE = 3.3uH * 6E9 / ((1 * 24V - 11.4V) * 2.2mΩ* 10) = 71,429 Ω

Standard value 68kΩ can be used.

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• Minimum V_IN from PSU: 11.4V. Use 11V startup voltage (0.4V below V_IN(MIN))

• Shutdown voltage should be > minimum voltage to drive low-side MOSFET gate. Should be at least 10V for full FET conduction

• Set V_HYS to 0.5V → shutdown voltage = 11V - 0.5V = 10.5V

R_UV2 = 0.5/10uA = 50 kΩ

R_UV1 = 1.2V * 50kΩ / (11V - 1.2V) = 6,122.4 Ω

Standard values:

R_UV2 = 51kΩ

R_UV1 = 6.2kΩ

• Try to source these from WARG library first.

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Gate charge of high-side MOSFET: Q_G = 31nC at 10V Vgs

Using 0.15V as a conservative estimate for ΔV_BST:

31nC/0.15V = 0.2067uF is the minimum C_BST value

A value of 0.47 uF is selected for C_BST.

Diode must be rated for peak SW node voltage (24V) + 16V → at least 40V rating

Low leakage current

Capacitor from VCC pin to ground

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A 1uF capacitor for C_VCC should be sufficient. Almost all reference designs use 0.47uF for C_BST and 1uF for C_VCC.

Soft-start:

• The LM5122 has an internal 10uA current source for soft-start, which gradually increases the voltage of an external soft-start capacitor upon startup.

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• t_SS: time for the output voltage to rise from input voltage level to target output voltage

Purpose

• Limit inrush current into output capacitors (and startup stress on FETs, inductor, and input supply)

• Prevents the output voltage overshooting the target upon startup

• Gives time for feedback loop & current sensing to stabilize

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• Selected value: 0.1uF or 100nF

  • Reference designs use a standard X7R 0.1uF cap

Soft-start time at minimum input voltage:

t_SS(MAX) = C_SS * 1.2V/10uA * (1-V_IN(MAX)/V_OUT)

t_SS(MAX) = 0.1uF * 1.2V/10uA * (1-11.4/24) = 6.3ms

At max input voltage:

t_SS(MIN) = C_SS * 1.2V/10uA * (1-V_IN(MIN)/V_OUT)

t_SS(MIN) = 0.1uF * 1.2V/10uA * (1-12.6/24) = 5.7ms

~6ms is a reasonable value for soft-start for our battery charging application.

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C_RES(MIN) = 30uA * 6.3ms / 1.2V = 0.1575uF minimum value

• Standard value of 330nF is chosen.

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RFB2 = 49.9kΩ and 845Ω in series

• A test point can be placed on either side of the 845Ω resistor for measuring loop stability - use a device like the Bode100 to inject current and measure frequency response of the loop.

RFB1 = 2.67kΩ

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• Key takeaways:

  • Crossover frequency: point at which the gain of the control loop is 0 dB (unity gain).

    • This sets how fast the system will respond to changes in V_OUT

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1. Set crossover frequency:

f_SW/10 = 250kHz/10 = 25 kHz

f_Z_RHP/4 = 24V/22A * (12V/24V)^2 / (4*2π*3.3uH/2) = 6.6 kHz

→ 6.6 kHz selected as crossover frequency f_c.

Phase margin - how much delay the system can handle before going unstable

@Andrew Chai suggested we aim for 60 degrees of phase margin

2. Determine required R_COMP

R_COMP = 6.6kHZ * π * 2.2m * R_FB2 * 10 * C_OUT * (24V/12V)

R_COMP = 6.6kHZ * π * 2.2m * (49.9k + 845) * 10 * 450uF * (24V/12V) = 20,833

→ A value of 22kΩ is chosen for R_COMP.

3. Determine C_COMP

C_COMP = R_LOAD * C_OUT / (4 * R_COMP) = V_OUT/I_OUT * C_OUT / (4 * R_COMP)

C_COMP = 24V/22A * 450uF / (4 * 22kΩ) = 5.5785 nF

5600 pF is chosen for C_COMP.

4. Determine C_HF

C_HF = R_ESR * C_OUT * C_COMP / (R_COMP * C_COMP - R_ESR * C_OUT)

C_HF = 13mΩ/3 * 450uF * 5600pF / (22kΩ * 5600pF - 13mΩ/3 * 450uF) = 90.061pF

100pF or 0.1nF is chosen for C_HF.